STK20C04

2-42

NO.

PARAMETER

UNITS

SYMBOLS

STK20C04-30

STK20C04-35

STK20C04-45

WRITE CYCLES #1 & #2

Note f:

NE must be high during entire cycle.

Note i:

Measured

± 200mV from steady state output voltage.

Note k: E or W must be high during address transitions.

Note m: If W is low when E goes low, the outputs remain in the high impedance state.

12

Write Cycle Time

45

45

45

ns

13

Write Pulse Width

35

35

35

ns

14

Chip Enable to End of Write

35

35

35

ns

15

Data Set-up to End of Write

30

30

30

ns

16

Data Hold After End of Write

0

0

0

ns

17

Address Set-up to End of Write

35

35

35

ns

18

Address Set-up to Start of Write

0

0

0

ns

19

Address Hold After End of Write

0

0

0

ns

20

i,m

Write Enable to Output Disable

35

35

35

ns

21

Output Active After End of Write

5

5

5

ns

#1

#2

#3

MIN

MAX

MIN

MAX

MIN

MAX

PREVIOUS DATA

ADDRESS

E

W

DATA IN

DATA OUT

DATA VALID

HIGH IMPEDANCE

12

14

19

17

18

13

15

16

20

21

ADDRESS

E

W

DATA IN

DATA OUT

HIGH IMPEDANCE

DATA VALID

12

18

14

19

17

13

15

16