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ADC3244IRGZR Arkusz danych(PDF) 6 Page - Texas Instruments

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Numer części ADC3244IRGZR
Szczegółowy opis  Analog-to-Digital Converters
Download  82 Pages
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

ADC3244IRGZR Arkusz danych(HTML) 6 Page - Texas Instruments

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ADC3241, ADC3242, ADC3243, ADC3244
SBAS671C – JULY 2014 – REVISED MARCH 2016
www.ti.com
Product Folder Links: ADC3241 ADC3242 ADC3243 ADC3244
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Analog supply voltage range, AVDD
–0.3
2.1
V
Digital supply voltage range, DVDD
–0.3
2.1
V
Voltage applied to input pins
INAP, INBP, INAM, INBM
–0.3
min (1.9, AVDD + 0.3)
V
CLKP, CLKM
–0.3
AVDD + 0.3
SYSREFP, SYSREFM
–0.3
AVDD + 0.3
SCLK, SEN, SDATA, RESET, PDN
–0.3
3.9
Temperature
Operating free-air, TA
–40
85
ºC
Operating junction, TJ
125
Storage, Tstg
–65
150
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V
(1)
After power-up, to reset the device for the first time, only use the RESET pin; see the Register Initialization section.
(2)
With the clock divider enabled by default for divide-by-1. Maximum sampling clock frequency for the divide-by-4 option is 500 MSPS.
7.3 Recommended Operating Conditions
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
SUPPLIES
AVDD
Analog supply voltage range
1.7
1.8
1.9
V
DVDD
Digital supply voltage range
1.7
1.8
1.9
V
ANALOG INPUT
VID
Differential input voltage
For input frequencies < 450 MHz
2
VPP
For input frequencies < 600 MHz
1
VIC
Input common-mode voltage
VCM ± 0.025
V
CLOCK INPUT
Input clock frequency
Sampling clock frequency
10
125(2)
MSPS
Input clock amplitude (differential)
Sine wave, ac-coupled
0.2
1.5
VPP
LVPECL, ac-coupled
1.6
LVDS, ac-coupled
0.7
Input clock duty cycle
35%
50%
65%
Input clock common-mode voltage
0.95
V
DIGITAL OUTPUTS
CLOAD
Maximum external load capacitance
from each output pin to GND
3.3
pF
RLOAD
Differential load resistance placed
externally
100
Ω


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