Zakładka z wyszukiwarką danych komponentów |
|
ADS7800JUE4 Arkusz danych(PDF) 9 Page - Texas Instruments |
|
ADS7800JUE4 Arkusz danych(HTML) 9 Page - Texas Instruments |
9 / 20 page ADS7800 9 SBAS001A www.ti.com FIGURE 7. Read Mode: R/C Pulse HIGH— Outputs Enabled Only When R/C is High. SYMBOL PARAMETER MIN TYP MAX UNITS tW R/C Pulse Width 40 10 ns tDBC BUSY delay from R/C 80 150 ns tB BUSY LOW 2.5 2.7 µs tAP Aperture Delay 13 ns ∆t AP Aperture Jitter 150 ps, rms tC Conversion Time 2.47 2.70 µs tDBE BUSY from End of Conversion 100 ns tDB BUSY Delay after Data Valid 25 75 200 ns tA Acquisition Time 130 300 ns tA+tC Throughput Time 2.6 3.0 µs tHDR Valid Data Held After R/C LOW 20 50 ns tS CS or HBE LOW before R/C Falls 25 5 ns tH CS or HBE LOW after R/C Falls 25 0 ns tDD Data Valid from CS LOW, R/C HIGH, and HBE in Desired State (Load = 100pF) 65 150 ns tHDR Valid Data Held After R/C Low 20 50 ns tHL Delay to Hi-Z State after R/C Falls or CS Rises (3k Ω Pullup or Pulldown) 50 150 ns TABLE III. Timing Specifications (TMIN to TMAX). Pin 24 may be slightly more sensitive than pin 23 to supply variations, but to maintain maximum system accuracy, both should be well isolated from digital supplies with wide load variations. To limit the effects of digital switching elsewhere in a system on the analog performance of the system, it often makes sense to run a separate +5V supply conductor from the supply regulator to any analog components requiring +5V, including the ADS7800. The VS pins (23 and 24) should be connected together and bypassed with a parallel combination of a 6.8 µF tantalum capacitor and a 0.1 µF ceramic capacitor located close to the converter to obtain noise-free operation. (See Figure 2.) The –VS pin 22 should be bypassed with a 1µF tantalum capacitor, again as close as possible to the ADS7800. Noise on the power supply lines can degrade converter performance, especially noise and spikes from a switching power supply. Appropriate supplies or filters must be used. The GND pins (4 and 13) are also separated internally, and should be directly connected to a ground plane under the FIGURE 8. Conversion Start Timing. R/C Converter Mode BUSY Acquire Convert Acquire Convert Data Valid Hi-Z State Data BUS Hi-Z State Hi-Z State Data Valid tHDR and tHL tC tAP tDBE tDD tDBC tW tB tA tAP CS or HBE R/C BUSY t S t H t W t DBC Data Bus Hi-Z State Data Valid tHDR and tHL |
Podobny numer części - ADS7800JUE4 |
|
Podobny opis - ADS7800JUE4 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |