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ADC08D1000WG-QV Arkusz danych(PDF) 9 Page - Texas Instruments |
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ADC08D1000WG-QV Arkusz danych(HTML) 9 Page - Texas Instruments |
9 / 50 page I / O GND V A TO INTERNAL CIRCUITRY ADC08D1000QML, ADC08D1000QML-SP ADC08D1000WG-QV www.ti.com SNAS352G – JANUARY 2007 – REVISED MARCH 2013 ADC08D1000 Converter Electrical Characteristics DC Parameters (continued) The following specifications apply after calibration for VA = VDR = +1.9VDC, OutV = 1.9V, VIN FSR (a.c. coupled) = differential 870mVP-P, CL = 10 pF, Differential, a.c. coupled Sinewave Input Clock, fCLK = 1 GHz at 0.5VP-P with 50% duty cycle, VBG = Floating, Non-Extended Control Mode, SDR Mode, REXT = 3300Ω ±0.1%, Analog Signal Source Impedance = 100Ω Differential. Boldface limits apply for TA = TMIN to TMAX (1)(2) Differential. Boldface limits apply for TA = TMIN to TMAX (1) (2) Sub- Parameter Test Conditions Notes Typ(3) Min Max Units groups STATIC CONVERTER CHARACTERISTICS Integral Non-Linearity (Best DC Coupled, 1MHz Sine Wave INL ±0.3 ±0.9 LSB 1, 2, 3 fit) Overanged DC Coupled, 1MHz Sine Wave DNL Differential Non-Linearity ±0.15 ±0.6 LSB 1, 2, 3 Overanged Resolution with No Missing 8 Bits 1, 2, 3 Codes VOFF Offset Error -0.45 −1.5 0.5 LSB 1, 2, 3 PFSE Positive Full-Scale Error See(4) −0.6 ±27 mV 1, 2, 3 NFSE Negative Full-Scale Error See(4) −1.31 ±27 mV 1, 2, 3 Out of Range Output Code (VIN+) − (VIN−) > + Full Scale 255 1, 2, 3 (In addition to OR Output (VIN+) − (VIN−) < − Full Scale 0 1, 2, 3 high) ANALOG INPUT AND REFERENCE CHARACTERISTICS VIN Full Scale Analog FSR pin 14 High 870 790 950 mVP-P 1, 2, 3 Differential Input Range RIN Differential Input Resistance 100 94 106 Ω 1, 2, 3 ANALOG OUTPUT CHARACTERISTICS Common Mode Output VCMO 1.26 0.95 1.45 V 1, 2, 3 Voltage Bandgap Reference Output VBG IBG = ±100 µA 1.26 1.20 1.33 V 1, 2, 3 Voltage CLOCK INPUT CHARACTERISTICS Sine Wave Clock 0.6 0.5 2.0 VP-P 1, 2, 3 Differential Clock Input VID Level Square Wave Clock 0.6 0.5 2.0 VP-P 1, 2, 3 DIGITAL CONTROL PIN CHARACTERISTICS VIH Logic High Input Voltage .85xVA V 1, 2, 3 .15xV VIL Logic Low Input Voltage V 1, 2, 3 A DIGITAL OUTPUT CHARACTERISTICS (1) The analog inputs are protected as shown below. Input voltage magnitudes beyond the Absolute Maximum Ratings may damage this device. (2) To ensure accuracy, it is required that VA and VDR be well bypassed. Each supply pin must be decoupled with separate bypass capacitors. Additionally, achieving rated performance requires that the bottom be well grounded. (3) Typical figures are at TA = 25°C, and represent most likely parametric norms. (4) Calculation of Full-Scale Error for this device assumes that the actual reference voltage is exactly its nominal value. Full-Scale Error for this device, therefore, is a combination of Full-Scale Error and Reference Voltage Error. See Figure 3. For relationship between Gain Error and Full-Scale Error, see Specification Definitions for Gain Error. Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: ADC08D1000QML ADC08D1000QML-SP ADC08D1000WG-QV |
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