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ADS1015-Q1 Arkusz danych(PDF) 8 Page - Texas Instruments |
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ADS1015-Q1 Arkusz danych(HTML) 8 Page - Texas Instruments |
8 / 38 page 12-Bit ADC Σ I C Interface 2 Voltage Reference Oscillator ALERT/RDY SCL SDA ADDR Gain = 2/3, 1, 2, 4, 8, or 16 PGA Comparator ADS1015-Q1 AIN1 AIN2 GND AIN0 AIN3 VDD MUX 8 ADS1015-Q1 SBAS511A – JULY 2010 – REVISED MARCH 2016 www.ti.com Product Folder Links: ADS1015-Q1 Submit Documentation Feedback Copyright © 2010–2016, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The ADS1015-Q1 device is a very small, low-power, 12-bit, delta-sigma ( ΔΣ) analog-to-digital converter (ADC). The ADS1015-Q1 device is easy to configure and design into a wide variety of applications, and allows precise measurements to be obtained with very little effort. The ADS1015QDGSRQ1 package option is automotive qualified, and the ADS1015AQDGSRQ1 package option is AEC-Q100 qualified. The ADS1015-Q1 device consists of a ΔΣ ADC core with adjustable gain, an internal voltage reference, a clock oscillator, and an I2C interface. Another feature available on the ADS1015-Q1 device is a programmable digital comparator that provides an alert on a dedicated pin. All of these features are intended to reduce required external circuitry and improve performance. Figure 8 shows the ADS1015-Q1 device functional block diagram. The ADS1015-Q1 device ADC core measures a differential signal, VIN, that is the difference of AINP and AINN. A MUX is available on the ADS1015-Q1 device. This architecture results in a strong attenuation of any common- mode signals. The converter core consists of a differential, switched-capacitor ΔΣ modulator followed by a digital filter. Input signals are compared to the internal voltage reference. The digital filter receives a high-speed bitstream from the modulator and outputs a code proportional to the input voltage. The ADS1015-Q1 device has two available conversion modes: single-shot mode and continuous conversion mode. In single-shot mode, the ADC performs one conversion of the input signal upon request and stores the value to an internal result register. The device then enters a low-power shutdown mode. This mode is intended to provide significant power savings in systems that only require periodic conversions or when there are long idle periods between conversions. In continuous conversion mode, the ADC automatically begins a conversion of the input signal as soon as the previous conversion is completed. The rate of continuous conversion is equal to the programmed data rate. Data can be read at any time and always reflect the most recent completed conversion. 8.2 Functional Block Diagram Figure 8. Functional Block Diagram 8.3 Feature Description 8.3.1 Multiplexer The ADS1015-Q1 device contains an input multiplexer, as shown in Figure 9. Either four single-ended or two differential signals can be measured. Additionally, AIN0 and AIN1 may be measured differentially to AIN3. The multiplexer is configured by three bits in the Config register. When single-ended signals are measured, the negative input of the ADC is internally connected to GND by a switch within the multiplexer. |
Podobny numer części - ADS1015-Q1 |
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Podobny opis - ADS1015-Q1 |
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