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ADS4245MRGC25EP Arkusz danych(PDF) 11 Page - Texas Instruments |
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ADS4245MRGC25EP Arkusz danych(HTML) 11 Page - Texas Instruments |
11 / 63 page ADS4245-EP www.ti.com SBAS653 – APRIL 2014 7.6 Electrical Characteristics: General Typical values are at +25°C, AVDD = 1.8V, DRVDD = 1.8V, 50% clock duty cycle, and –1dBFS differential analog input (unless otherwise noted). Minimum and maximum values are across the recommended operating condition (unless otherwise noted), AVDD = 1.8V, and DRVDD = 1.8V. PARAMETER MIN TYP MAX UNIT ANALOG INPUTS Differential input voltage range (0dB gain) 2 VPP Differential input resistance (at 200MHz) 0.75 k Ω Differential input capacitance (at 200MHz) 3.7 pF Analog input bandwidth 550 MHz (with 50 Ω source impedance, and 50Ω termination) Analog input common-mode current 1.5 µA/MSPS (per input terminal of each channel) Common-mode output voltage VCM 0.95 V VCM output current capability 4 mA DC ACCURACY Offset error –25 2.5 25 mV Temperature coefficient of offset error 0.003 mV/°C Gain error as a result of internal reference inaccuracy alone EGREF –4 4 %FS Gain error of channel alone EGCHAN ±0.1 %FS Temperature coefficient of EGCHAN 0.002 Δ%/°C POWER SUPPLY IAVDD 105 130 mA Analog supply current IDRVDD Output buffer supply current 99 120 mA LVDS interface, 350mV swing with 100 Ω external termination, fIN = 2.5MHz IDRVDD Output buffer supply current 49 mA CMOS interface, no load capacitance (1) fIN = 2.5MHz Analog power 189 mW Digital power 179 mW LVDS interface, 350mV swing with 100 Ω external termination, fIN = 2.5MHz Digital power CMOS interface, no load capacitance (1) 88 mW fIN = 2.5MHz Global power-down 25 mW (1) In CMOS mode, the DRVDD current scales with the sampling frequency, the load capacitance on output terminals, input frequency, and the supply voltage (see the CMOS Interface Power Dissipation section in the Application Information). Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ADS4245-EP |
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