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ADS7815UG4 Arkusz danych(PDF) 7 Page - Texas Instruments |
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ADS7815UG4 Arkusz danych(HTML) 7 Page - Texas Instruments |
7 / 16 page ADS7815 7 SBAS065B www.ti.com REFERENCE The ADS7815 can be operated with the internal 2.5V refer- ence or an external reference. By applying an external reference to the REF pin, the internal reference is bypassed. The reference voltage at REF is buffered internally. The voltage at the reference input sets the full-scale range of the converter. With the internal 2.5V reference, the input range is ±2.5V. Thus, the input range of the converter’s analog input is simply ±V REF, where VREF is the voltage at the reference input. Because of internal gain and offset error, the input range will not be exactly ±V REF. The full-scale error of the converter with an external reference will typi- cally be 0.25% or less. The bipolar zero error will be similar to that listed in the Electrical Characteristics table. The range for the external reference is 2.3V to 2.7V. REF PIN The REF pin itself should be bypassed with a 0.1 µF ceramic capacitor in parallel with a 2.2 µF tantalum capacitor. While both capacitors should be physically close to the ADS7815, it is very important that the ceramic capacitor be placed as close as possible. The REF voltage should not be used to drive a large load or any load which is dynamic. A large load will reduce the reference voltage and the corresponding input range of the converter. A dynamic load will modulate the reference voltage and this modulation will be present in the converter’s output data. CAP PIN The voltage on the CAP pin is the output of the reference buffer. This pin should be bypassed with a 0.1 µF ceramic capacitor in parallel with a 2.2 µF tantalum capacitor. While both capacitors should be physically close to the ADS7815, it is very important that the ceramic capacitor be placed as close as possible. The CAP pin connects to the internal reference buffer and directly to the binary weighted capacitor array of the con- verter. Thus, the signal at the CAP pin has high-frequency glitches which occur at each bit decision. For this reason, the CAP voltage should not be used to provide a reference voltage for external circuitry. R/C and CS should remain static prior to that start of conversion and during the later part of a conversion. To start a conversion, R/C should be taken LOW at least 100ns before CS is taken LOW. R/C and/or CS should be taken HIGH during the early part of the conversion, preferably within 200ns of the start of the conversion. If these times are not observed, then there is risk that the transition of these digital signals may affect the conversion result. The three NAND gates shown in Figure 1 can be used to generate R/C and CS signals from a single negative going pulse. BUSY BUSY goes LOW when a conversion is started and remains LOW throughout the conversion. Just prior to BUSY going HIGH, the digital outputs become active with the conversion result. Time t11, shown in Figure 2, should provide adequate time for the ADS7815 to drive the digital outputs to a valid logic state before BUSY rises. As shown in Figure 1 and 2, the rising edge of BUSY can be used to latch the digital result into an external component. DIGITAL OUTPUT The ADS7815’s digital output is in Binary Two’s Comple- ment (BTC) format. Table III shows the relationship be- tween the digital output word and analog input voltage under ideal conditions. ANALOG DESCRIPTION INPUT BINARY CODE HEX CODE Full Scale Range ±2.5V Least Significant 76 µV Bit (LSB) +Full Scale 2.499924V 0111 1111 1111 1111 7FFF (2.5V – 1LSB) Midscale 0V 0000 0000 0000 0000 0000 One LSB below Midscale –76 µV 1111 1111 1111 1111 FFFF –Full Scale –2.5V 1000 0000 0000 0000 8000 DIGITAL OUTPUT BINARY TWO’S COMPLEMENT Table III. Ideal Input Voltages and Output Codes. |
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