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ADS7823 Arkusz danych(PDF) 8 Page - Texas Instruments |
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ADS7823 Arkusz danych(HTML) 8 Page - Texas Instruments |
8 / 19 page ADS7823 8 SBAS180B FIGURE 1. Simplified I/O of the ADS7823. Microcontroller +2.7V to +3.6V 1 µF to 10 µF + 2k Ω 2k Ω 5 Ω 1 µF to 10 µF + 0.1 µF ADS7823 V REF A IN A0 V DD SDA SCL A1 GND THEORY OF OPERATION The ADS7823 is a classic Successive Approximation Register (SAR) A/D converter. The architecture is based on capacitive redistribution which inherently includes a sample-and-hold function. The converter is fabricated on a 0.6 µ CMOS process. The ADS7823 core is controlled by an internally-generated free-running clock. When the ADS7823 is not performing conversions or being addressed, it keeps the A/D converter core powered off, and the internal clock does not operate. The ADS7823 has an internal 4-word first-in last-out buffer (FILO) that stores the results of up to four conversions while they are waiting to be read out over the I2C bus. The simplified diagram of input and output for the ADS7823 is shown in Figure 1. ANALOG INPUT When the converter enters the hold mode, the voltage on the AIN pin is captured on the internal capacitor array. The input current on the analog inputs depends on the conversion rate of the device. During the sample period, the source must charge the internal sampling capacitor (typically 25pF). After the capacitor has been fully charged, there is no further input current. The amount of charge transfer from the analog source to the converter is a function of conversion rate. REFERENCE INPUT The external reference sets the analog input range. The ADS7823 will operate with a reference in the range of 50mV to VDD. There are several important implications of this. As the reference voltage is reduced, the analog voltage weight of each digital output code is reduced. This is often referred to as the LSB (least significant bit) size and is equal to the reference voltage divided by 4096. This means that any offset or gain error inherent in the A/D converter will appear to increase, in terms of LSB size, as the reference voltage is reduced. The noise inherent in the converter will also appear to increase with lower LSB size. With a 2.5V reference, the internal noise of the converter typically contributes only 0.32LSB peak-to- peak of potential error to the output code. When the external reference is 50mV, the potential error contribution from the internal noise will be 50 times larger—16LSBs. The errors due to the internal noise are Gaussian in nature and can be reduced by averaging consecutive conversion results. DIGITAL INTERFACE The ADS7823 supports the I2C serial bus and data transmis- sion protocol, in all three defined modes: standard, fast, and high-speed. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. |
Podobny numer części - ADS7823 |
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Podobny opis - ADS7823 |
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