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74FCT162841CTPACT Arkusz danych(PDF) 1 Page - Texas Instruments |
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74FCT162841CTPACT Arkusz danych(HTML) 1 Page - Texas Instruments |
1 / 20 page 20-Bit Latches CY74FCT16841T CY74FCT162841T SCCS067A - July 1994 - Revised October 2001 Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. Copyright © 2001, Texas Instruments Incorporated Features • FCT-C speed at 5.5 ns (FCT16841T Com’l) •Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temperature range of −40˚C to +85˚C •VCC = 5V ± 10% CY74FCT16841T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT162841T Features: • Balanced 24 mA output drivers • Reduced system switching noise • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C Functional Description The CY74FCT16841T and CY74FCT162841T are 20-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 10-bit latches, or as a single 10-bit latch, or as a single 20-bit latch by connecting the Output Enable (OE) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16841T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162841T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162841T is ideal for driving transmission lines. C GND 1D1 Pin Configuration TO 9 OTHER CHANNELS C 2D1 2Q1 2LE 2OE D 1Q7 1OE SSOP/TSSOP Top View 1Q1 1LE 1OE 1Q1 1Q2 1 Q3 1Q4 1D1 1D2 1D3 1D4 1LE GND GND VCC 1Q5 1Q6 1D5 1D6 VCC GND 2D1 GND GND VCC VCC GND D 1Q8 1Q10 2Q1 1Q9 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8 2Q9 2Q10 2OE 1D7 GND 1D8 1D9 1D10 2D2 2D3 2D4 2D5 2D6 2D7 2D8 2D9 2D10 2LE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 FCT16841-1 FCT16841-2 FCT16841-3 TO 9 OTHER CHANNELS Logic Block Diagrams |
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