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CDC304 Arkusz danych(PDF) 1 Page - Texas Instruments

Numer części CDC304
Szczegółowy opis  Octal Divide By 2 Circuit/Clock Driver
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CDC304 Arkusz danych(HTML) 1 Page - Texas Instruments

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CDC304
OCTAL DIVIDEBY 2 CIRCUIT/CLOCK DRIVER
SCAS325A − JULY 1990 − REVISED NOVEMBER 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
D Replaces SN74AS304
D Maximum Output Skew of 1 ns
D Maximum Pulse Skew of 1.5 ns
D TTL-Compatible Inputs and Outputs
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D Package Options Include Plastic
Small-Outline (D) Package and Standard
Plastic (N) 300-mil DIPs
description
The CDC304 contains eight flip-flops designed to have low skew between outputs. The eight outputs (in-phase
with CLK) toggle on successive CLK pulses. Preset (PRE) and clear (CLR) inputs are provided to set the Q
outputs high or low independent of the clock (CLK) input.
The CDC304 has output and pulse-skew parameters tsk(o) and tsk(p) to ensure performance as a clock driver
when a divide-by-two function is required.
The CDC304 is characterized for operation from 0
°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUTS
CLR
PRE
CLK
OUTPUTS
Q1− Q8
L
H
X
L
H
LX
H
L
LX
L†
H
H
Q0
H
H
L
Q0
† This configuration does not persist
when PRE or CLR returns to its
inactive (high) level.
logic symbol
S
10
R
14
11
CLK
Q1
15
Q2
16
Q3
1
Q4
2
Q5
6
Q6
7
T
PRE
CLR
Q7
8
Q8
9
‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Copyright
 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q3
Q4
GND
GND
GND
Q5
Q6
Q7
Q2
Q1
CLR
VCC
VCC
CLK
PRE
Q8
D OR N PACKAGE
(TOP VIEW)


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