AD6635BB datasheet(8/60 Pages) AD

Numer części	AD6635BB

Szczegółowy opis	4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)

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Producent	AD [Analog Devices]

Strona internetowa	http://www.analog.com

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REV. 0

–8–

AD6635

SPECIFICATIONS (continued)

GENERAL TIMING CHARACTERISTICS1, 2

Test

AD6635BB

Parameter (Conditions)

Temp

Level

Min

Typ

Max

Unit

CLKn TIMING REQUIREMENTS

tCLK

CLKn Period

Full

I

12.5

ns

tCLKL

CLKn Width Low

Full

IV

5.6

0.5

tCLK

ns

tCLKH

CLKn Width High

Full

IV

5.6

0.5

tCLK

ns

RESET TIMING REQUIREMENTS

tRESL

RESET Width Low

Full

I

30.0

ns

INPUT WIDEBAND DATA TIMING REQUIREMENTS

tSI

Input to

≠CLKn Setup Time

Full

IV

2.0

ns

tHI

Input to

≠CLKn Hold Time

Full

IV

1.0

ns

LEVEL INDICATOR OUTPUT SWITCHING CHARACTERISTICS

tDLI

≠CLKn to LIx-y Output Delay Time

Full

IV

3.3

10.0

ns

SYNC TIMING REQUIREMENTS

tSS

SYNC(A, B, C, D) to

≠CLKn Setup Time

Full

IV

2.0

ns

tHS

SYNC(A, B, C, D) to

≠CLKn Hold Time

Full

IV

1.0

ns

SERIAL PORT CONTROL TIMING REQUIREMENTS

SWITCHING CHARACTERISTICS

2

tSCLK

SCLKn (n = 0, 4) Period

Full

IV

16

ns

tSCLKL

SCLKn Low Time

Full

IV

3.0

ns

tSCLKH

SCLKn High Time

Full

IV

3.0

ns

INPUT CHARACTERISTICS

tSSI

SDIn to

ØSCLKn Setup Time

Full

IV

1.0

ns

tHSI

SDIn to

ØSCLKn Hold Time

Full

IV

1.0

ns

PARALLEL PORT TIMING REQUIREMENTS

(MASTER MODE) SWITCHING CHARACTERISTICS

3

tDPOCLKL

ØCLKn to ≠PCLKn Delay (Divide by 1)

Full

IV

6.5

10.5

ns

tDPOCLKLL

ØCLKn to ≠PCLKn Delay (Divide by 2, 4, or 8) Full

IV

8.3

14.6

ns

tDPREQ

≠CLKn to ≠PxREQ Delay

1.0

ns

tDPP

≠CLKn to Px[15:0] Delay

0.0

ns

INPUT CHARACTERISTICS

tSPA

PxACK to

ØPCLKn Setup Time

7.0

ns

tHPA

PxACK to

ØPCLKn Hold Time

–3.0

ns

PARALLEL PORT TIMING REQUIREMENTS

(SLAVE MODE) SWITCHING CHARACTERISTICS

3

tPOCLK

PCLKn Period

Full

I

12.5

ns

tPOCLKL

PCLKn Low Period (when PCLK Divisor = 1)

Full

IV

2.0

0.5

tPOCLK

ns

tPOCLKH

PCLKn High Period (when PCLK Divisor = 1)

Full

IV

2.0

0.5

tPOCLK

ns

tDPREQ

≠CLKn to ≠PxREQ Delay

10.0

ns

tDPP

≠CLKn to Px[15:0] Delay

11.0

ns

Podobny numer części - AD6635BB

Producent	Numer części	Arkusz danych	Szczegółowy opis
Analog Devices	AD6635	805Kb / 60P	4-Channel, 80 MSPS WCDMA Receive Signal Processor REV. 0

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Podobny opis - AD6635BB

Producent	Numer części	Arkusz danych	Szczegółowy opis
Analog Devices	AD6634	925Kb / 52P	80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) REV. 0
	AD6635	805Kb / 60P	4-Channel, 80 MSPS WCDMA Receive Signal Processor REV. 0
	AD6634	931Kb / 52P	80 MSPS, Dual-Channel WCDMA Receive Signal Processor REV. 0
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	AD6624A	636Kb / 40P	Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) REV. 0
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	AD6624A	642Kb / 40P	Four-Channel, 100 MSPS Digital Receive Signal Processor REV. 0
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	AD6620	399Kb / 44P	67 MSPS Digital Receive Signal Processor REV. A

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