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ADUM1100UR-RL7 Arkusz danych(PDF) 10 Page - Analog Devices |
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ADUM1100UR-RL7 Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 16 page REV. E ADuM1100 –10– 1.7 3.0 1.3 1.2 1.1 3.5 4.0 4.5 5.0 5.5 1.4 1.6 1.5 –40 C +25 C +125 C INPUT SUPPLY VOLTAGE, VDD1 (V) TPC 7. Typical Input Voltage Switching Threshold, Low-to-High Transition INPUT SUPPLY VOLTAGE, VDD1 (V) 1.4 3.0 1.0 0.9 0.8 3.5 4.0 4.5 5.0 5.5 1.1 1.3 1.2 –40 C +25 C +125 C TPC 8. Typical Input Voltage Switching Threshold, High-to-Low Transition LH VITH(H–L) INPUT (VI) VITH(L–H) VI HL t PHL t' PHL t PLH t' PLH OUTPUT (VO) 50% 50% Figure 4. Impact of Input Rise/Fall Time on Propagation Delay APPLICATION INFORMATION PC Board Layout The ADuM1100 digital isolator requires no external interface circuitry for the logic interfaces. A bypass capacitor is recom- mended at the input and output supply pins. The input bypass capacitor may most conveniently be connected between Pins 3 and 4 (Figure 2). Alternatively, the bypass capacitor may be located between Pins 1 and 4. The output bypass capacitor may be con- nected between Pins 7 and 8 or Pins 5 and 8. The capacitor value should be between 0.01 µF and 0.1 µF. The total lead length between both ends of the capacitor and the power supply pins should not exceed 20 mm. VDD1 V1 (DATA) GND1 VDD2 VO (DATA OUT) GND2 (OPTIONAL) Figure 2. Recommended Printed Circuit Board Layout INPUT (VI) OUTPUT (VO) t PLH t PHL 50% 50% Figure 3. Propagation Delay Parameters Propagation Delay-Related Parameters Propagation delay time describes the length of time it takes for a logic signal to propagate through a component. Propagation delay time to logic low output and propagation delay time to logic high output refer to the duration between an input signal transition and the respective output signal transition (Figure 3). Pulse width distortion is the maximum difference between tPLH and tPHL and provides an indication of how accurately the input signal’s timing is preserved in the component’s output signal. Propagation delay skew is the difference between the minimum and maximum propagation delay values among multiple ADuM1100 compo- nents operated at the same operating temperature and having the same output load. Depending on the input signal rise/fall time, the measured propa- gation delay based on the input 50% level can vary from the true propagation delay of the component (as measured from its input switching threshold). This is due to the fact that the input threshold, as is the case with commonly used optocouplers, is at a different voltage level than the 50% point of typical input signals. This propagation delay difference is given by ∆ ∆ LH PLH PLH r I ITH L H HL PHL PHL f I ITH H L tt t V V V tt t V V V =− = () − () =− = () − () − () − () '/ . . '/ . . 08 05 08 05 1 1 where: tPLH, tPHL = propagation delays as measured from the input 50% level. t ′ PLH, t ′ PHL = propagation delays as measured from the input switching thresholds. tr , tf = input 10% to 90% rise/fall time. VI =amplitude of input signal (0 to VI levels assumed). VITH(L–H), VITH(H–L) = input switching thresholds. |
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