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LM117HVQML-SP Arkusz danych(PDF) 4 Page - Texas Instruments |
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LM117HVQML-SP Arkusz danych(HTML) 4 Page - Texas Instruments |
4 / 30 page LM117HVQML, LM117HVQML-SP SNVS357D – MARCH 2006 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) Power Dissipation(2) Internally limited Input - Output Voltage Differential +60V, −0.3V Maximum Junction Temperature +150°C Storage Temperature −65°C ≤ TA ≤ +150°C Lead Temperature (Soldering, 10 sec.) 300°C Thermal Resistance θJA TO Metal Can - Still Air 39°C/W TO Metal Can - 500LF/Min Air flow 14°C/W TO Metal Can - Still Air 186°C/W TO Metal Can - 500LF/Min Air flow 64°C/W CFP "WG" (device 01, 61) - Still Air 115°C/W CFP "WG" (device 01, 61) - 500LF/Min Air flow 66°C/W CFP "GW" (device 02, 62) - Still Air 130°C/W CFP "GW" (device 02, 62) - 500LF/Min Air flow 80°C/W θJC TO Metal Can 1.9°C/W TO Metal Can 21°C/W CFP "WG" (device 01, 61)(3) 3.4°C/W CFP "GW" (device 02, 62) 7°C/W ESD Tolerance(4) 2000V (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. (2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. "Although power dissipation is internally limited, these specifications are applicable for power dissipations of 2W for the PFM package and 20W for the TO package." (3) The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θJA, rather than θJC, thermal resistance. It must not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the lead frame material is very poor, relative to the material of the package base. The stated θJC thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device. (4) Human body model, 1.5 k Ω in series with 100 pF. Recommended Operating Conditions Operating Temperature Range −55°C ≤ TA ≤ +125°C Table 2. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A Subgroup Description Temp °C 1 Static tests at 25 2 Static tests at 125 3 Static tests at -55 4 Dynamic tests at 25 5 Dynamic tests at 125 6 Dynamic tests at -55 7 Functional tests at 25 8A Functional tests at 125 4 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LM117HVQML LM117HVQML-SP |
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