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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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LM27224A Arkusz danych(PDF) 4 Page - Texas Instruments |
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LM27224A Arkusz danych(HTML) 4 Page - Texas Instruments |
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4 / 11 page  NRND LM2724A SNVS242C – JUNE 2003 – REVISED MARCH 2013 www.ti.com Electrical Characteristics — LM2724A VCC = BOOT = SYNC = 5V, SW = GND = 0V, unless otherwise specified. Tyicals and limits appearing in plain type apply for TA = TJ = +25°C. Limits appearing in boldface type apply over the entire operating temperature range. Symbol Parameter Condition Min Typ Max Units POWER SUPPLY Iq_op Operating Quiescent Current IN = 0V 145 195 µA TOP DRIVER Peak Pull-Up Current 3.0 A Pull-Up Rds_on IBOOT = IHG = 0.3A 1.2 Ω Peak Pull-down Current −3.2 A Pull-down Rds_on ISW = IHG = 0.3A 0.5 Ω t4 Rise Time Timing Diagram, CLOAD = 3.3nF 17 ns t6 Fall Time 12 ns t3 Pull-Up Dead Time Timing Diagram 19 ns t5 Pull-Down Delay Timing Diagram, from IN Falling Edge 27 ns BOTTOM DRIVER Peak Pull-Up Current 3.2 A Pull-up Rds_on IVCC = ILG = 0.3A 1.1 Ω Peak Pull-down Current 3.2 A Pull-down Rds_on IGND = ILG = 0.3A 0.6 Ω t8 Rise Time Timing Diagram, CLOAD = 3.3nF 17 ns t2 Fall Time 14 ns t7 Pull-up Dead Time Timing Diagram 22 ns t1 Pull-down Delay Timing Diagram 13 ns LOGIC Vuvlo_up VCC Under-Voltage-Lock-Out Upper Threshold VCC rises from 0V toward 5V 4 V Vuvlo_dn VCC Under-Voltage-Lock-Out Lower Threshold VCC falls from 5V toward 0V 2.5 V Vuvlo_hys VCC Under-Voltage-Lock-Out Hysteresis VCC falls from 5V toward 0V 0.8 V VIH_SYNC SYNC Pin High Input 55% VCC VIL_SYNC SYNC Pin Low Input 25% Ileak_SYNC SYNC Pin Leakage Current SYNC = 5V, Sink Current 2 µA SYNC = 0V, Source Current 10 Ileak_IN IN = 0V, Source Current 2 IN Pin Leakage Current µA IN = 5V, Sink Current 10 ton_min1 Minimum Positive Pulse Width at IN Pin(1) 160 ton_min2 Minimum Positive Pulse Width at IN Pin for HG to 45 Respond(2) ton_min3 Minimum Positive Pulse Width at IN Pin for LG to 10 Respond(3) ns toff_min1 Minimum Negative Pulse Width at IN Pin for LG 40 to Respond(4) toff_min2 Minimum Negative Pulse Width at IN Pin for HG 5 to Respond(5) VIH_IN IN High Level Input Voltage When IN pin goes high from 0V 55% VCC VIL_IN IN Low Level Input Voltage When IN pin goes low from 5V 25% (1) If the positive pulse width at IN pin is below this value but above ton_min2, the pulse is internally stretched to ton_min1, so the HG width will be a constant value. (2) If the positive pulse width at IN pin is below this value but above ton_min3, then HG stops responding while LG still responds to the pulse. (3) If the positive pulse width at IN pin is below this value, the pulse will be completely ignored. Neither HG or LG will respond to it. (4) If the negative pulse width at IN pin is below this value but above toff_min2, then LG stops responding while HG still responds. (5) If the negative pulse width at IN pin is below this value, the pulse will be completely ignored. Neither HG or LG will respond to it. 4 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LM2724A |
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