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SN74ALS667NT3 Arkusz danych(PDF) 6 Page - Texas Instruments |
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SN74ALS667NT3 Arkusz danych(HTML) 6 Page - Texas Instruments |
6 / 12 page SN74ALS666, SN74ALS667 8-BIT D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS SDAS227A – JUNE 1984 – REVISED JANUARY 1995 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, TA = MIN to MAX† UNIT PARAMETER (INPUT) (OUTPUT) SN74ALS666 UNIT MIN MAX tPLH D Q 3 14 ns tPHL D Q 4 18 ns tPLH LE Q 6 21 ns tPHL LE Q 8 27 ns tPHL CLR Q 9 29 ns tPHL CLR D 11 32 ns tPLH PRE Q 7 22 ns tPHL PRE D 9 28 ns t ‡ OERB D 4 21 ns ten‡ OE1, OE2 Q 4 21 ns tdi § OERB D 1 14 ns tdis§ OE1, OE2 Q 1 14 ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ ten = tPZH or tPZL § tdis = tPHZ or tPLZ switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, TA = MIN to MAX† UNIT PARAMETER (INPUT) (OUTPUT) SN74ALS667 UNIT MIN MAX tPLH D Q 6 20 ns tPHL D Q 4 15 ns tPLH LE Q 9 28 ns tPHL LE Q 7 22 ns tPHL CLR Q 7 24 ns tPHL CLR D 8 26 ns tPLH PRE Q 8 25 ns tPHL PRE D 9 28 ns t ‡ OERB D 4 21 ns ten‡ OE1, OE2 Q 4 21 ns tdi § OERB D 1 14 ns tdis§ OE1, OE2 Q 1 14 ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ ten = tPZH or tPZL § tdis = tPHZ or tPLZ |
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