MPA4609

3

SBOS252E

www.ti.com

AC PERFORMANCE (Figure 1)

Large Signal Bandwidth,

90

80

75

MHz

min

B

95

78

65

V/V

min

A

95

115

120

V/V

max

A

Minimum Open Load Gain

190

160

140

V/V

min

A

Maximum Open Load Gain

190

220

240

V/V

max

A

Differential Slew Rate

150

V/

µsec

typ

C

Differential Rise/Fall Time

±250mV Step

3.5

4.4

4.7

nsec

min

B

Total Harmonic Distortion

–64

dBc

typ

C

Input Noise Voltage (differential)

F > 100kHz

0.65

0.80

0.85

nV/

√Hz

max

B

Input Noise Current (each input)

F > 100kHz

3.8

5.1

5.7

pA/

√Hz

max

B

Channel-To-Channel X-talk (Input

→ Output)

F = 5MHz, CH A measured,

–55

dBc

typ

C

Input Offset Voltage

±0.2

±0.95

mV

max

A

Input Offset Voltage Drift

±1

µV/°Cmax

B

Input Bias Current

–51

–70

–75

µAmax

A

Input Offset Current

±0.25

µA

typ

C

Forward/Reverse Gain Match

Channel Pairs

±2.3

±11

%

max

A

INPUT

Externally Applied (CMIR)

1.3

1.4

1.5

V

min

A

Externally Applied (CMIR)

2.3

2.3

2.2

V

max

A

Input Bias Resistor

3000

Ω

typ

C

Input Bias Resistor Tolerance

±16

%

max

A

Input Differential Capacitance

3.5

pF

typ

C

Minimum Common-Mode Bias Voltage

Internal Reference

2

1.85

1.75

V

min

A

Maximum Common-Mode Bias Voltage

Internal Reference

2

2.15

2.25

V

max

A

Common-Mode Rejection Ratio (DC)

36

25

24

dB

min

A

Input to Differential Output

OUTPUT

Output Offset Voltage

±40

±450

mV

max

A

Minimum Common-Mode Output Voltage

2.1

1.95

1.85

V

min

A

Maximum Common-Mode Output Voltage

2.1

2.25

2.35

V

max

A

Maximum Differential Output Voltage Swing

3.5

2.8

2.6

Vpp

min

A

Single Ended Output Impedance

470

Ω

typ

C

Single Ended Output Impedance Tolerance

±16

%

max

A

CHANNEL SELECT (F/R)

TTL/CMOS Compatible

Highest Logic Low Level

Logic Low = REV Channels

1.0

0.9

0.9

V

max

A

Lowest Logic High Level

Logic High = FOR Channels

1.5

1.6

1.6

V

min

A

Logic Low Input Bias Current (each pin)

F/R pins = 0V

70

µA

typ

C

Logic High Input Bias Current (each pin)

F/R pins = 5V

1

µA

typ

C

Channel Switching Time

50

nsec

typ

C

Output Differential Glitch in Switching

All Inputs, 65

Ω Differential Source

±15

mV

typ

C

Unselected Channel Feedthrough

All Channel Pairs,

–50

–36

–36

dB

max

A

Unselected Input (

±100mV) to Output

POWER SUPPLY

Specified Operating Voltage

5

V

typ

C

Maximum Operating Voltage

6.0

6.0

V

max

A

Minimum Operating Voltage

4.5

4.5

V

min

A

Maximum Quiescent Supply Current

49

52

59

mA

max

A

Minimum Quiescent Supply Current

49

46

42

mA

min

A

Power Supply Rejection Ratio (DC)

50

34

33

dB

min

A

to Differential Output

TEMPERATURE RANGE

Specification: I

–40 to +85

°C

°C

typ

C

Thermal Resistance,

θ

JA

Junction-to-Ambient

PFB TQFP-48

60

°C/W

typ

C

NOTES: (1) Junction temperature = ambient temperature for low temperature limit and +25

°C specifications. Junction temperature = ambient temperature

+15

°C at high temperature limit specifications.

(2) Test Levels:

(A) 100% DC tested at +25

°C. Over-temperature limits by characterization and simulation.

(B) Limits set by characterization and simulation.

(C) Typical value only for information.

(4) Tested < 3dB below minimum specified CMRR at CMIR limits.

TEST

MPA4609IPFB

TYP

PARAMETER

CONDITION

+25

+25

0 to +70

MIN/MAX

Boldface limits are tested at +25