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TPL5010DDCT Arkusz danych(PDF) 11 Page - Texas Instruments |
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TPL5010DDCT Arkusz danych(HTML) 11 Page - Texas Instruments |
11 / 25 page ¸ ¸ ¹ · ¨ ¨ © § a T c a b b R EXT 2 100 4 100 2 VIN POWER MANAGEMENT VOUT GND µC GPIO VDD GND Rp GPIO RSTn TPL5010 VDD GND RSTn WAKE DELAY/ M_RST DONE REXT Battery VIN POWER MANAGEMENT VOUT GND µC GPIO VDD GND Rp GPIO RSTn TPL5010 VDD GND RSTn WAKE DELAY/ M_RST DONE REXT Battery 11 TPL5010 www.ti.com SNAS651 – JANUARY 2015 Product Folder Links: TPL5010 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Programming (continued) Figure 11. Manual Reset with SPST Switch For use cases that do not require the lowest power consumption, using a single pole single throw switch may offer a lower cost solution. The DELAY/M_RST pin may be directly connected to VDD with REXT in the circuit. The current drawn from the supply voltage during the reset is given by VDD/REXT. Figure 12. Manual Reset with SPDT Switch The reset function may also be asserted by switching DELAY/M_RST from REXT to VDD using a single pole double throw switch, which will provide a lower power solution for the manual reset, because no current flows. 8.5.3 Timer Interval Selection Using External Resistance In order to set the time interval, the external resistance REXT is selected according the following formula: (1) Where: • T is the desired time interval in seconds. • REXT is the resistance value to use in Ω. • a,b,c are coefficients depending on the range of the time interval. |
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