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TPL7407L

SLRS066D – JANUARY 2014 – REVISED MARCH 2016

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(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-

±500

6.3 Recommended Operating Conditions

Over operating temperature range

MIN

MAX

UNIT

OUT1 – OUT7 pin voltage for recommended operation

0

40

V

COM pin voltage range for full output drive

8.5

40

V

IN1- IN7 input low voltage ("Off" high impedance output)

0.9

V

IN1- IN7 input high voltage ("Full Drive" low impedance output)

1.5

V

Operating virtual junction temperature

–40

125

°C

Continuous drain current

0

500

mA

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

6.4 Thermal Information

TPL7407L

UNIT

SOIC (D)

TSSOP (PW)

16 PINS

16 PINS

Junction-to-ambient thermal resistance

91.9

115.2

°C/W

Junction-to-case (top) thermal resistance

50.1

49.5

°C/W

Junction-to-board thermal resistance

49.4

60.8

°C/W

Junction-to-top characterization parameter

18.6

8.5

°C/W

Junction-to-board characterization parameter

49.1

60.2

°C/W

6.5 Electrical Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

OUT1- OUT7 low-level output

voltage

200

320

mV

420

650

current

10

500

nA

Clamp forward voltage

1.4

V

IN1- IN7 Off-state input current

500

nA

IN1- IN7 ON state input current

V

10

μA

Static current flowing through COM

pin

15

25

μA