GS1674 Adaptive Cable Equalizer

Data Sheet

54168 - 2

September 2012

8 of 16

3. Detailed Description

Figure 3-1: GS1674 Functional Block Diagram

The GS1674 is a high-speed BiCMOS IC designed to equalize serial digital signals.

The GS1674 can equalize HD and SD serial digital signals, and will typically equalize

200m at 1.485Gb/s and 400m at 270Mb/s. The GS1674 is powered from a single +3.3V

power supply, and consumes approximately 195mW of power.

3.1 Serial Data Inputs

The Serial Data Input signals can be connected to the input pins (SDI/SDI) in either a

differential or single-ended configuration. AC-coupling of the inputs is recommended,

as the SDI and SDI inputs are internally biased at approximately 1.8V.

3.2 Cable Equalization

The input signal passes through a variable gain equalizing stage, whose frequency

response closely matches the inverse of the cable loss characteristic. In addition, the

variation of the frequency response with control voltage imitates the variation of the

inverse cable loss characteristic with cable length.

The edge energy of the equalized signal is monitored by a detector circuit which

produces an error signal corresponding to the difference between the desired edge

energy and the actual edge energy. This error signal is integrated by both an internal and

an external AGC filter capacitor providing a steady control voltage for the gain stage. As

the frequency response of the gain stage is automatically varied by the application of

negative feedback, the edge energy of the equalized signal is kept at a constant level

which is representative of the original edge energy at the transmitter. The equalized

signal is also DC-restored, effectively restoring the logic threshold of the equalized

signal to its correct level independent of shifts due to AC-coupling.

Equalizer

Output

AGC

SDI

MUTE

SDO

BYPASS

CD

SDI

SDO

AGC

AGC

SQ_ADJ

Squelch Adjust

Carrier Detect

Mute

DC

Restore