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Si8283CD-IS Arkusz danych(PDF) 9 Page - Silicon Laboratories |
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Si8283CD-IS Arkusz danych(HTML) 9 Page - Silicon Laboratories |
9 / 43 page 2.12.9 Low Supply Voltage Configuration The low supply voltage configuration is used when 3.0 V to 5.5 V supply rails are available. All product options of the Si8281 and Si8283 are intended for this configuration. An advantage of Si828x devices over other converters that use this same topology is that the output voltage is sensed on the secon- dary side without requiring additional optocouplers and support circuitry to bias those optocouplers. This allows the dc-dc to operate with superior line and load regulation while reducing external components and increasing lifetime reliability. In a typical isolated gate driver application, the dc-dc powers the Si8281 and Si8283 VDDB and VSSB as shown in the figure below. The Si8281 and Si8283 dc-dc circuit in the figure below can deliver up to 2 W of output power for Vin = 5 V and 1 W for Vin = 3.3 V. The dc-dc requires an input capacitor, C2, blocking capacitor, C1, transformer, T1, rectifying diodes, D1 and D2, and output capacitors, C26, and C27. Resistors R1 and R2 divide the output voltage to match the internal reerence of the error amplifier. The ratio of the two secon- dary windings, S1 and S2, splits the output voltage into two portions. The positive VDDB and the negative VSSB with common refer- ence to VMID (IGBT Emitter). VDDB = VOUT × ( S1 S1 + S2 ) VSSB = − VOUT × ( S2 S1 + S2 ) Type 1 loop compensation made by RCOMP and CCOMP are required at the COMP pin. The combination of RCOMP = 200 kΩ and CCOMP = 1 nF satisfies most Si8281 and Si8283 dc-dc applications. Though it is not necessary for normal operation, we recommend that an RC snubber (not shown) be placed in parallel with the secondary winding to minimize radiated emissions. RDY /FLT VH VL Si8281/Si8283 Freq. Control and Shutdown Soft Start UVLO Power FET DC-DC Controller VSW SH_FC SS VDDA CSS RFSW Power FET Error Amp and Compensation Encoder UVLO VDDB VSNS COMP VSSB R1 VSSB Vin C1 T1 D1 C26 HF RX HF TX R2 C2 RCOMP CCOMP DSAT Detection HF RX Driver Miller Clamp CLMP DSAT VMID HF TX Decoder Encoder Decoder /RST +IN -IN Input Control & Reset D2 C27 VDDP S1 S2 VMID Figure 2.5. Si8281/83 Block Diagram: 3 V–5 V Input to Split Voltage Output 2.12.10 High Supply Voltage Configuration 2h =.w..]6+*28x9q\\- Si8281/82/83/84 Data Sheet System Overview silabs.com | Smart. Connected. Energy-friendly. Preliminary Rev. 0.5 | 8 |
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