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ADM824 Arkusz danych(PDF) 6 Page - Analog Devices

Numer części ADM824
Szczegółowy opis  Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SC70 and SOT-23
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Strona internetowa  http://www.analog.com
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ADM824 Arkusz danych(HTML) 6 Page - Analog Devices

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ADM823/ADM824/ADM825
Preliminary Technical Data
Rev.PrB | Page 6 of 10
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM823
TOP VIEW
(Not to Scale)
RESET 1
GND 2
MR 3
VCC
WDI
5
4
Figure 2. ADM823 Pin Configuration
ADM824
TOP VIEW
(Not to Scale)
RESET 1
GND 2
RESET 3
VCC
WDI
5
4
Figure 3. ADM824 Pin Configuration
ADM825
TOP VIEW
(Not to Scale)
RESET 1
GND 2
RESET 3
VCC
MR
5
4
Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin. No.
Mnemonic
Description
1
RESET
Push-Pull Active-Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH.
2
GND
Ground.
3
MR (ADM823)
Manual Reset Input. This is an active-low input which, when forced low for at least 1µs, generates
a reset. It features a 52 k
internal pull-up.
RESET (ADM824/ADM825)
Active-High, Push-Pull Reset Output.
4
WDI (ADM823/ADM824)
Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
MR (ADM825)
Manual Reset Input.
5
VCC
Power Supply Voltage Being Monitored.


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