WAKE

DONE

RSTn

DELAY/

M_RST

MISSED

DONE

LOW FREQUENCY

OSCILLATOR

FREQUENCY

DIVIDER

RSTn

WAKE

VDD

GND

DELAY/

M_RST

DECODER

&

MANUAL RESET

DETECTOR

LOGIC

CONTROL

DONE

8

TPL5010-Q1

SNAS679 – SEPTEMBER 2016

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8 Detailed Description

8.1 Overview

The TPL5010-Q1 is a system wakeup timer with a watchdog feature, ideal for low power applications. TPL5010-

Q1 is ideal for use in interrupt-driven applications and provides selectable timing from 100 ms to 7200 s.

8.2 Functional Block Diagram

8.3 Feature Description

The DONE, WAKE and RSTn signals are used to implement the watchdog function. The TPL5010-Q1 is

programmed to issue a periodic WAKE pulse to a µC which is in sleep or standby mode. After receiving the

WAKE pulse, the µC must issue a DONE signal to the TPL5010-Q1 at least 20 ms before the rising edge of the

next WAKE pulse. If the DONE signal is not asserted, the TPL5010-Q1 asserts the RSTn signal to reset the µC.

A manual reset function is realized by momentarily pulling the DELAY/M_RST pin to VDD.

Figure 8. Watchdog

8.3.1 WAKE

The WAKE pulse is sent out from the TPL5010-Q1 when the programmed time interval starts (except at the

beginning of the first cycle or if in the previous interval the DONE has not been received).

This signal is normally low.

8.3.2 DONE

The DONE pin is driven by a µC to signal successful processing of the WAKE signal. The TPL5010-Q1

recognizes a valid DONE signal as a low to high transition; if two or more DONE signals are received within the

time interval, only the first DONE signal is processed.

The DONE signal resets the counter of the watchdog only. If the DONE signal is received when the WAKE is still

high, the WAKE will go low as soon as the DONE is recognized.