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TSB83AA22A Arkusz danych(PDF) 1 Page - Texas Instruments

Numer części TSB83AA22A
Szczegółowy opis  TSB83AA22A IEEE Std 1394b-2002 Phy and OHCI Link Device
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

TSB83AA22A Arkusz danych(HTML) 1 Page - Texas Instruments

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FEATURES
TSB83AA22A
SLLA255 – APRIL 2006
TSB83AA22A IEEE Std 1394b-2002 Phy and OHCI Link Device
Low-Jitter, External Crystal Oscillator
Provides Transmit and Receive Data at
Fully Supports Provisions of IEEE Std
100/200/400/800 Mbps and Link-Layer
1394b-2002 Revision 1.33+ at 1-Gigabit
Controller Clock at 49.152 MHz and 98.304
Signaling Rates
MHz
Fully Supports Provisions of IEEE Std
Separate Bias (TPBIAS) for Each Port
1394a-2000 and IEEE Std 1394-1995
Standards for High-Performance Serial Bus
Software Device Reset (SWR)
Fully Interoperable With Firewire™, i.LINK™,
Fail-Safe Circuitry Senses Sudden Loss of
and SB1394 Implementations of IEEE Std
Power to the Device and Disables the Ports
1394
Ensure That the TSB83AA22A Does Not Load
the TPBIAS of Any Connected Device and
Provides Two Fully Backward-Compatible,
Blocks any Leakage From the Port Back to
IEEE Std 1394a-2000 Fully Compliant)
Power Plane.
Bilingual IEEE Std 1394b-2002 Cable Ports at
up to 800 Megabits per Second (Mbps)
The TSB83AA22A Has an IEEE Std
1394a-2000-Compliant Common-Mode Noise
Full IEEE Std 1394a-2000 Support Includes:
Filter on Incoming Bias Detect Circuit to Filter
– Connection Debounce
Out Cross-Talk Noise.
– Arbitrated Short Reset
The TSB83AA22A Is Port Programmable to
– Multispeed Concatenation
Force IEEE Std 1394a-2000 Mode to Allow
– Arbitration Acceleration
Use of IEEE Std 1394a-2000 Connectors
– Fly-By Concatenation
(IEEE Std 1394b-2002 Signaling Must Not Be
Put Across IEEE Std 1394a-2000 Connectors
– Port Disable/Suspend/Resume
or Cables).
Extended Resume Signaling for Compatibility
3.3-V and 5-V PCI Signaling Environments
With Legacy DV Devices
Serial-Bus Data Rates of 100 Mbps, 200
Power-Down Features to Conserve Energy in
Mbps, 400 Mbps, and 800 Mbps
Battery-Powered Applications
Physical Write Posting of up to Three
Low-Power Sleep Mode
Outstanding Transactions
Fully Compliant With Open Host Controller
Serial ROM or Boot ROM Interface Supports
Interface (OHCI) Requirements
2-wire Serial EEPROM Devices
Cable Power Presence Monitoring
33-MHz/32-Bit PCI Interface
Cable Ports Monitor Line Conditions for
Multifunction Terminal (MFUNC Terminal 1):
Active Connection to Remote Node
– PCI_CLKRUN Protocol per the PCI Mobile
Register Bits Give Software Control of
Design Guide
Contender Bit, Power-Class Bits, Link Active
Control Bit, and IEEE Std 1394a-2000
– General-Purpose I/O
Features
– CYCLEIN/CYCLEOUT for External Cycle
Interoperable With Other 1394 Physical
Timer Control for Customized
Layers (Phy) Using 1.8-V, 3.3-V, and 5-V
Synchronization
Supplies
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Firewire is a trademark of Apple Computer, Inc..
i.LINK is a trademark of Sony Kabushiki Kaisha TA Sony Corporation..
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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