MC100LVEL13DWR2G datasheet(4/6 Pages) ONSEMI

Numer części	MC100LVEL13DWR2G

Szczegółowy opis	ECL Dual 1:3 Fanout Buffer

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MC100LVEL13

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Table 5. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 1))

−40°C

25°C

85°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

fmax

Maximum Toggle Frequency

TBD

GHz

tPLH

tPHL

Propagation Delay CLK to Q/Q

410

600

430

500

620

450

640

ps

tsk(O)

Output−Output Skew

Any Qa to Qa, Any Qb to Qb

Any Qa to Any Qb

50

75

50

75

50

75

ps

tskew

Duty Cycle Skew |tPLH−tPHL|

50

ps

tJITTER

Cycle-to-Cycle Jitter

TBD

ps

VPP

Input Swing (Note 2)

150

1000

150

1000

150

1000

mV

tr

tf

Output Rise/Fall Times Q (20%−80%)

230

500

230

500

230

500

ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

1. VEE can vary ±0.3 V.

2. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.

Figure 2. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices)

Driver

Device

Receiver

Device

QD

Q

D

Zo = 50 W

50 W

VTT

VTT = VCC − 2.0 V

Resource Reference of Application Notes

AN1405/D

− ECL Clock Distribution Techniques

AN1406/D

− Designing with PECL (ECL at +5.0 V)

AN1503/D

− ECLinPSt I/O SPiCE Modeling Kit

AN1504/D

− Metastability and the ECLinPS Family

AN1568/D

− Interfacing Between LVDS and ECL

AN1672/D

− The ECL Translator Guide

AND8001/D − Odd Number Counters Design

AND8002/D − Marking and Date Codes

AND8020/D − Termination of ECL Logic Devices

AND8066/D − Interfacing with ECLinPS

AND8090/D − AC Characteristics of ECL Devices

Podobny numer części - MC100LVEL13DWR2G

Producent	Numer części	Arkusz danych	Szczegółowy opis
ON Semiconductor	MC100LVEL13DWR2G	117Kb / 6P	3.3V ECL Dual 1:3 Fanout Buffer November, 2006 ??Rev. 5

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Podobny opis - MC100LVEL13DWR2G

Producent	Numer części	Arkusz danych	Szczegółowy opis
ON Semiconductor	MC100LVEL13	117Kb / 6P	3.3V ECL Dual 1:3 Fanout Buffer November, 2006 ??Rev. 5
	MC100EL13	116Kb / 6P	5V ECL Dual 1:3 Fanout Buffer October, 2006 ??Rev. 5
	MC100EL13	146Kb / 5P	5V ECL Dual 1:3 Fanout Buffer July, 2016 ??Rev. 7
	MC100LVEL13	91Kb / 3P	Dual 1:3 Fanout Buffer 1996 REV 1
	MC10EP11	191Kb / 12P	ECL 1:2 Differential Fanout Buffer July, 2016 ??Rev. 11
	MC10LVEP11	249Kb / 13P	ECL 1:2 Differential Fanout Buffer August, 2016 ??Rev. 14
	MC100LVEL11	99Kb / 8P	ECL 1:2 Differential Fanout Buffer January, 2015 ??Rev. 13
	MC100LVE210	84Kb / 8P	3.3V ECL Dual 1:4, 1:5 Differential Fanout Buffer December, 2006 ??Rev. 7
	MC100E210	64Kb / 8P	5V ECL Dual 1:4, 1:5 Differential Fanout Buffer October, 2003 ??Rev. 2
	MC100LVEL11	141Kb / 8P	3.3V ECL 1:2 Differential Fanout Buffer December, 2006 ??Rev. 8

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