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MC100LVEL17DWG Arkusz danych(PDF) 1 Page - ON Semiconductor |
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1 / 7 page © Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. 9 1 Publication Order Number: MC100LVEL17/D MC100LVEL17 3.3 V ECL Quad Differential Receiver Description The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled down to VEE. This operation will force the Q output LOW and ensure stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Features • 325 ps Propagation Delay • High Bandwidth Output Transitions • The 100 Series Contains Temperature Compensation • PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −3.8 V • Internal Input Pulldown Resistors D Inputs; Pullup and Pulldown on D Inputs • Q Output will Default LOW with Inputs Open or at VEE • These Devices are Pb-Free, Halogen Free and are RoHS Compliant www.onsemi.com *For additional marking information, refer to Application Note AND8002/D. MARKING DIAGRAM* A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb-Free Package SOIC−20 WB DW SUFFIX CASE 751D−05 20 1 100LVEL17 AWLYYWWG ORDERING INFORMATION Device Package Shipping† MC100LVEL17DWG SOIC−20 WB (Pb-Free) 38 Units / Tube MC100LVEL17DWR2G 1000 Tape & Reel †For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SOIC−20 WB (Pb-Free) |
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