CMOS Linear Regulator

Data Sheet

ADP1763

Rev. 0

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FEATURES

3 A maximum output current

Low input voltage supply range

Ultralow noise: 2 μV rms, 100 Hz to 100 kHz

Noise spectral density

4 nV/√Hz at 10 kHz

3 nV/√Hz at 100 kHz

Low dropout voltage: 95 mV typical at 3 A load

Operating supply current: 4.5 mA typical at no load

±1.5% fixed output voltage accuracy over line, load, and

temperature

Excellent power supply rejection ratio (PSRR) performance

59 dB typical at 10 kHz at 3 A load

43 dB typical at 100 kHz at 3 A load

Excellent load/line transient response

Soft start to reduce inrush current

Optimized for small 10 μF ceramic capacitors

Current-limit and thermal overload protection

Power-good indicator

Precision enable

16-lead, 3 mm × 3 mm LFCSP package

APPLICATIONS

Regulation to noise sensitive applications such as radio

frequency (RF) transceivers, analog-to-digital converter

(ADC) and digital-to-analog converter (DAC) circuits,

phase-locked loops (PLLs), voltage controlled oscillators

(VCOs) and clocking integrated circuits

Field-programmable gate array (FPGA) and digital signal

processor (DSP) supplies

Medical and healthcare

Industrial and instrumentation

GENERAL DESCRIPTION

The ADP1763 is a low noise, low dropout (LDO) linear regulator. It

is designed to operate from a single input supply with an input

voltage as low as 1.10 V without the requirement of an external bias

supply to increase efficiency and provide up to 3 A of output current.

The low 95 mV typical dropout voltage at a 3 A load allows the

ADP1763 to operate with a small headroom while maintaining

regulation and providing better efficiency.

The ADP1763 is optimized for stable operation with small 10 μF

ceramic output capacitors. The ADP1763 delivers optimal

transient performance with minimal board area.

TYPICAL APPLICATION CIRCUITS

VIN

EN

SS

VREG

VOUT

SENSE

10µF

PG

100kΩ

PG

VADJ

GND

REFCAP

10µF

ON

OFF

ADP1763

1µF

1µF

10nF

Figure 1. Fixed Output Operation

VIN

EN

SS

VREG

VOUT

SENSE

PG

100kΩ

PG

VADJ

GND

REFCAP

1µF

1µF

10kΩ

10nF

ON

OFF

ADP1763

10µF

10µF

Figure 2. Adjustable Output Operation

Table 1. Related Devices

Device

Input

Voltage

Maximum

Current

Fixed/

Adjustable

Package

ADP1761

1.10 V to

1.98 V

1 A

Fixed/adjustable

16-lead

LFCSP

ADP1762

1.10 V to

1.98 V

2 A

Fixed/adjustable

16-lead

LFCSP

ADP1740/

ADP1741

1.6 V to

3.6 V

2 A

Fixed/adjustable

16-lead

LFCSP

ADP1752/

ADP1753

1.6 V to

3.6 V

0.8 A

Fixed/adjustable

16-lead

LFCSP

ADP1754/

ADP1755

1.6 V to

3.6 V

1.2 A

Fixed/adjustable

16-lead

LFCSP

The ADP1763 is available in fixed output voltages ranging from

0.9 V to 1.5 V. The output of the adjustable output model can be

set from 0.5 V to 1.5 V through an external resistor connected

between VADJ and ground.

The ADP1763 has an externally programmable soft start time by

connecting a capacitor to the SS pin. Short-circuit and thermal

overload protection circuits prevent damage in adverse conditions.

The ADP1763 is available in a small 16-lead LFCSP package for the

smallest footprint solution to meet a variety of applications.