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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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DM9008F Arkusz danych(PDF) 10 Page - List of Unclassifed Manufacturers |
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DM9008F Arkusz danych(HTML) 10 Page - List of Unclassifed Manufacturers |
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10 / 68 page  DM9008 ISA/Plug & Play Super Ethernet Contoller 10 Final Version :DM9008-DS-F02 June 14, 2000 Register Descriptions Configuration Register A (CRA) Configuration Register A can be read at address 0AH in Page 0 of ENC, and can be written by following a read to address 0AH with a write to address 0AH. If address 0AH is written without a previous read to 0AH, the write will be regarded as a write to register RBCR0 of ENC. 765432 10 FREAD INT2 INT1 INT0 IOAD3 IOAD2 IOAD1 IOAD0 Bit Symbol Description 0 - 3 IOAD0 IOAD1 IOAD2 IOAD3 I/O Address: These three bits determine the base I/O address of DM9008 within the PC system's I/O map bit3 bit2 bit1 bit0 I/O base 0 0 0 0 300H 0 0 0 1 320H 0 0 1 0 340H 0 0 1 1 360H 0 1 0 0 380H 0 1 0 1 3A0H 0 1 1 0 3C0H 0 1 1 1 3E0H bit3 bit2 bit1 bit0 I/O base 1 0 0 0 200H 1 0 0 1 220H 1 0 1 0 240H 1 0 1 1 260H 1 1 0 0 280H 1 1 0 1 2A0H 1 1 1 0 2C0H 1 1 1 1 2E0H 4 - 6 INT0 INT1 INT2 Interrupt Pin Mapping: Only one interrupt output pin will be driven active when a valid interrupt condition occurs bit5 bit4 bit3 Interrupt 0 0 0 IRQ3 0 0 1 IRQ4 0 1 0 IRQ5 0 1 1 IRQ9 1 0 0 IRQ10 1 0 1 IRQ11 1 1 0 IRQ12 1 1 1 IRQ15 7 FREAD Fast Read: In the remote DMA read mode. When this bit is set high, the DM9008 will begin the next port fetch before the current IOR is completed |
Podobny numer części - DM9008F |
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Podobny opis - DM9008F |
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