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MC14017BDR2G Arkusz danych(PDF) 1 Page - ON Semiconductor

Numer części MC14017BDR2G
Szczegółowy opis  Decade Counter
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MC14017BDR2G Arkusz danych(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 9
1
Publication Order Number:
MC14017B/D
MC14017B
Decade Counter
The MC14017B is a five−stage Johnson decade counter with
built−in code converter. High speed operation and spike−free outputs
are obtained by use of a Johnson decade counter design. The ten
decoded outputs are normally low, and go high only at their
appropriate decimal time period. The output changes occur on the
positive−going edge of the clock pulse. This part can be used in
frequency division applications as well as decade counter or decimal
decode display applications.
Features
Fully Static Operation
DC Clock Input Circuit Allows Slow Rise Times
Carry Out Output for Cascading
Divide−by−N Counting
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
Pin−for−Pin Replacement for CD4017B
Triple Diode Protection on All Inputs
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
−0.5 to +18.0
V
Vin, Vout
Input or Output Voltage Range
(DC or Transient)
−0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
−55 to +125
°C
Tstg
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature
(8−Second Soldering)
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/
_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING DIAGRAM
SOIC−16
D SUFFIX
CASE 751B
14017BG
AWLYWW
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W
= Work Week
G
= Pb−Free Indicator
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
1
16
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Cout
CE
CLOCK
RESET
VDD
Q8
Q4
Q9
Q2
Q0
Q1
Q5
VSS
Q3
Q7
Q6


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