AD6315

1/4- to 1/12 Duty VFD Controller/Driver

Anachip Corp.

www.anachip.com.tw

Rev. A5 Dec 29, 2003

10/16

(5) Key Scanning And Display Timing

DIG

1

DIG

2

DIG

3

DIG

n

Key scan data

DIG

1

SEG output

G

1

G

2

G

3

G

n

1 frame = T

s

T

DISP

µ

500

≅

DISP

T

16

/

1

Note : One cycle of key scanning consists of two frame, and data in 1 16 X 2 matrix is stored in RAM.

(6) Key Scan Expansion

1st frame

1

2

3

4

5

6

7

8

2nd frame

9

10 11 12 13 14 15 16

(7) Serial Communication Format

Reception (command/data write)

If data continues

STB

D

IN

CLK

12

3

7

8

b7

b6

b2

b1

b0