ADS8661IRUMT datasheet(10/71 Pages) TI1

Numer części	ADS8661IRUMT

Szczegółowy opis	12-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System with Programmable, Bipolar Input Ranges

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SCLK

Data Read Time

tSU_CSCK

SDO-0

tDEN_CSDO

tD_CKDO

M

M-1

M-2

L+1

L

tD_CSDO

tHT_CKCS

SDI

tSU_CKDI

tHT_CKDI

tconv_max

tD_CSRVS

RVS

tcycle

tD_CSRVS

CPOL = 0

CPOL = 1

CONVST/CS

RVS

twl_RST

RST

trst

td_rst

ADCST (Internal)

tcycle

RVS

tconv

tacq

CONVST/CS

The CS falling edge can

be issued after tconv_max

or when RVS goes high.

10

ADS8661, ADS8665

SBAS780 – DECEMBER 2016

www.ti.com

Product Folder Links: ADS8661 ADS8665

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Figure 1. Conversion Cycle Timing Diagram

Figure 2. Asynchronous Reset Timing Diagram

Figure 3. Standard SPI Interface Timing Diagram for CPHA = 0

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