ADS58J64IRMPT datasheet(4/81 Pages) TI1

Numer części	ADS58J64IRMPT

Szczegółowy opis	Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver Device

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ADS58J64

SBAS807 – JANUARY 2017

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Product Folder Links: ADS58J64

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Pin Functions (continued)

I/O

DESCRIPTION

NAME

NO.

INPUT, REFERENCE (continued)

INDM

14

I

Differential analog input pin for channel D, internal bias via a 2-kΩ resistor to VCM

INDP

13

CLOCK, SYNC

CLKINM

28

I

Differential clock input pin for the ADC with internal 100-Ω differential termination, requires external ac coupling

CLKINP

27

SYSREFM

34

I

External SYSREF input, requires dc coupling and external termination

SYSREFP

33

CONTROL, SERIAL

NC

22, 23

—

No connection

PDN

50

I/O

Power down. This pin can be configured via an SPI register setting. This pin has an internal 10-kΩ pulldown

resistor.

RES

49

—

Reserved pin, connect to GND

RESET

48

I

Hardware reset; active high. This pin has an internal 10-kΩ pulldown resistor.

SCLK

6

I

Serial interface clock input. This pin has an internal 10-kΩ pulldown resistor.

SDIN

5

I

Serial interface data input. This pin has an internal 10-kΩ pulldown resistor.

SDOUT

11

O

1.8-V logic serial interface data output

SEN

7

I

Serial interface enable. This pin has an internal 10-kΩ pullup resistor to DVDD.

TRDYAB

54

O

Trigger-ready output for burst mode for channels A and B. This pin can be configured via SPI to a TRDY signal for

all four channels in burst mode, and can be left open if not used.

TRDYCD

1

O

Trigger-ready output for burst mode for channels C and D. This pin can be configured via SPI to a TRDY signal for

all four channels in burst mode, and can be left open if not used.

TRIGAB

53

I

Manual burst mode trigger input for channels A and B. This pin can be configured via SPI to a manual trigger input

signal for all four channels in burst mode, and can be connected to GND if not used. This pin has an internal 10-

kΩ pulldown resistor.

TRIGCD

2

I

Manual burst mode trigger input for channels C and D. This pin can be configured via SPI to a manual trigger

input signal for all four channels in burst mode, and can be connected to GND if not used. This pin has an internal

10-kΩ pulldown resistor.

DATA INTERFACE

DAM

59

O

JESD204B serial data output pin for channel A

DAP

58

DBM

62

O

JESD204B serial data output pin for channel B

DBP

61

DCM

65

O

JESD204B serial data output pin for channel C

DCP

66

DDM

68

O

JESD204B serial data output pin for channel D

DDP

69

SYNCbABM

56

I

Synchronization input pin for JESD204B port channels A and B. This pin can be configured via SPI to a SYNCb

signal for all four channels. This pin has an internal differential termination of 100 Ω.

SYNCbABP

55

SYNCbCDM

71

I

Synchronization input pin for JESD204B port channels C and D. This pin can be configured via SPI to a SYNCb

signal for all four channels. This pin has an internal differential termination of 100 Ω..

SYNCbCDP

72

POWER SUPPLY

AGND

21, 26, 29, 32

I

Analog ground

AVDD

9, 12, 15, 17, 20,

25, 30, 35, 38,

40, 43, 44, 46

I

Analog 1.15-V power supply

AVDD19

10, 16, 24, 31,

39, 45

I

Analog 1.9-V supply for analog buffer

DGND

3, 52, 60, 63, 67

I

Digital ground

DVDD

4, 8, 47,51, 57,

64, 70

I

Digital 1.15-V power supply

Thermal pad

—

Connect to GND

Podobny numer części - ADS58J64IRMPT

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Texas Instruments	ADS58J64IRMPT	8Mb / 84P	[Old version datasheet] ADS58J64 Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver Device

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Podobny opis - ADS58J64IRMPT

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