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Si50122-A4-GMR Arkusz danych(PDF) 9 Page - Silicon Laboratories |
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Si50122-A4-GMR Arkusz danych(HTML) 9 Page - Silicon Laboratories |
9 / 14 page Si50122-A3/A4 Rev 0.7 9 3. Pin Descriptions Figure 6. 10-Pin TDFN Table 6. Si50122-Ax-GM 10-Pin TDFN Descriptions Pin # Name Type Description 1 VSS GND Connect to Ground 2 REFOUT O, SE 25 MHz LVCMOS clock output 3NC NC No Connect. Do not connect this pin to anything. 4 DIFF1 O, DIF 0.7 V, 100 MHz differential clock output 5 DIFF1 O, DIF 0.7 V, 100 MHz differential clock output 6 VSS GND Connect to Ground 7 DIFF2 O, DIF 0.7 V, 100 MHz differential clock output 8 DIFF2 O, DIF 0.7 V, 100 MHz differential clock output 9VDD PWR Power supply 10 VDD PWR Power supply 10 9 8 7 1 2 3 4 VSS REF O UT NC 5 6 VSS D IFF2 D IFF2 D IFF1 D IFF1 VDD VDD |
Podobny numer części - Si50122-A4-GMR |
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Podobny opis - Si50122-A4-GMR |
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