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ISL29501IRZ-T7A Arkusz danych(PDF) 3 Page - Intersil Corporation

Numer części ISL29501IRZ-T7A
Szczegółowy opis  Time of Flight (ToF) Signal Processing IC
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Producent  INTERSIL [Intersil Corporation]
Strona internetowa  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL29501IRZ-T7A Arkusz danych(HTML) 3 Page - Intersil Corporation

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ISL29501
3
FN8681.3
June 29, 2016
Submit Document Feedback
Pin Configuration
ISL29501
(24 LD QFN)
TOP VIEW
Block Diagram
FIGURE 2. BLOCK DIAGRAM
DIGITAL
CALIBRATION
AND
PROCESSING
A TO D
CONVERTER
OSCILLATOR
I
2
C
SDA
SCL
PDp
PDn
EMITTER
DRIVER
IRQ
SS
EIR
EVSS
Av
BPF
AVCC
DVDD
EVCC
AVSS
DVSS
RSET
-
+
Pin Descriptions
PIN #
PIN
NAME
DESCRIPTION
1, 2, 13 AVSS Tie to AVSS.
3
CEn
Chip Enable. Active Low.
4A2
I2C address bit, pull to DVCC or DVSS
5SDA
I2C data bus.
6SCL
I2C clock bus.
7A1
I2C ID address bit, pull to DVCC or DVSS.
19
18
17
16
15
14
13
1
2
3
4
5
6
7
AVSS
AVSS
CEn
A2
SDA
SCL
A1
AVDD
VOUT
AVCC
AVSS
DVSS
DVCC
AVSS
EPAD
8
IRQ
Interrupt. Active low open-drain output signal to host. A
2.7kΩ pull-up to supply is required.
9
SS
Sample start: input signal with HIGH to LOW edge
active.
10
EVSS Emitter driver ground. Connects to cathode of emitter.
11
EIR
Emitter driver output. Connects to anode of emitter.
12
EVCC Emitter driver supply. Decouple with 2.2µF or larger
capacitor along with a 0.1µF for high frequency.
14
DVCC Digital power 2.7V to 3.3V supply.
15
DVSS Digital power ground.
16
AVSS Analog power ground.
17
AVCC Analog power 2.7 to 3.3V supply.
18
VOUT AFE LDO Output, tied to AVDD, decouple with 1µF and
0.01µF capacitor pair.
19
AVDD AFE analog supply.
20, 23
AVSS Analog ground shield.
21
PDp
Photodiode cathode input.
22
PDn
Photodiode anode input.
24
RSET Sets chip bias current. Tie to 10kΩ resistor 1% to AVSS
ground.
EPAD Center EPAD: Tied to AVSS.
Pin Descriptions (Continued)
PIN #
PIN
NAME
DESCRIPTION


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