ADA4610-1/ADA4610-2/ADA4610-4

Data Sheet

Rev. G | Page 8 of 25

V+

8

OUT B

7

–IN B

6

+IN B

5

ADA4610-2

TOP VIEW

(Not to Scale)

Figure 4. ADA4610-2 Pin Configuration, 8-Lead SOIC (R Suffix)

OUT A

–IN A

+IN A

V–

V+

OUT B

–IN B

+IN B

1

2

3

4

8

7

6

5

ADA4610-2

TOP VIEW

(Not to Scale)

Figure 5. ADA4610-2 Pin Configuration, 8-Lead MSOP (RM Suffix)

NOTES

1. THE EXPOSED PAD MUST BE

CONNECTED TO V–.

OUT A

–IN A

+IN A

V–

OUT B

V+

–IN B

+IN B

3

4

1

2

6

5

8

7

ADA4610-2

TOP VIEW

(Not to Scale)

Figure 6. ADA4610-2 Pin Configuration, 8-Lead LFCSP (CP Suffix)

Table 8. ADA4610-2 Pin Function Descriptions, 8-Lead SOIC, 8-Lead MSOP, and 8-Lead LFCSP

Pin No.

Mnemonic

Description

1

OUT A

Output Channel A.

2

−IN A

Inverting Input Channel A.

3

+IN A

Noninverting Input Channel A.

4

V−

Negative Supply Voltage.

5

+IN B

Noninverting Input Channel B.

6

−IN B

Inverting Input Channel B.

7

OUT B

Output Channel B.

8

V+

Positive Supply Voltage.

EPAD

Exposed Pad for the 8-Lead LFCSP (CP Suffix). The exposed pad must be connected to V−.