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ADA4807-2ACPZ-R7 Arkusz danych(PDF) 2 Page - Analog Devices

Numer części ADA4807-2ACPZ-R7
Szczegółowy opis  3.1 nV/?숰z, 1 mA, 180 MHz, Rail-to-Rail Input/Output Amplifiers
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADA4807-2ACPZ-R7 Arkusz danych(HTML) 2 Page - Analog Devices

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ADA4807-1/ADA4807-2/ADA4807-4
Data Sheet
Rev. B | Page 2 of 33
TABLE OF CONTENTS
Features .............................................................................................. 1
 
Applications....................................................................................... 1
 
Pin Connection Diagrams............................................................... 1
 
General Description ......................................................................... 1
 
Revision History ............................................................................... 2
 
Specifications..................................................................................... 3
 
±5 V Supply ................................................................................... 3
 
5 V Supply...................................................................................... 5
 
3 V Supply...................................................................................... 7
 
Absolute Maximum Ratings............................................................ 9
 
Maximum Power Dissipation ..................................................... 9
 
Thermal Resistance ...................................................................... 9
 
ESD Caution.................................................................................. 9
 
Pin Configurations and Function Descriptions ......................... 10
 
Typical Performance Characteristics ........................................... 13
 
Frequency Response................................................................... 13
 
Frequency and Supply Current................................................. 15
 
DC and Input Common-Mode Performance......................... 16
 
Slew, Transient, Settling Time, and Crosstalk............................. 18
 
Distortion and Noise.................................................................. 20
 
Output Characteristics............................................................... 22
 
Overdrive Recovery and Turn On/Turn Off Times .............. 23
 
Theory of Operation ...................................................................... 24
 
Disable Circuitry ........................................................................ 25
 
Input Protection ......................................................................... 25
 
Noise Considerations................................................................. 25
 
Applications Information .............................................................. 26
 
Capacitive Load Drive ............................................................... 26
 
Low Noise FET Operational Amplifier ................................... 26
 
Power Mode ADC Driver ......................................................... 27
 
ADC Driving............................................................................... 28
 
ADC Driving with Dynamic Power Scaling........................... 29
 
Layout, Grounding, and Bypassing.......................................... 30
 
Outline Dimensions ....................................................................... 31
 
Ordering Guide .......................................................................... 33
 
REVISION HISTORY
9/15—Rev. A to Rev. B
Added ADA4807-4.............................................................Universal
Changes to Features Section, General Description Section, and
Table 1 ..........................................................................................................1
Added Figure 4, Renumbered Sequentially .................................. 1
Changes to Table 2............................................................................ 3
Changes to Table 3............................................................................ 5
Changes to Table 4............................................................................ 7
Deleted Figure 6, Renumbered Sequentially............................... 10
Changes to Figure 6........................................................................ 10
Added Figure 9 and Table 9, Renumbered Sequentially ........... 12
Changes to Figure 20...................................................................... 14
Added Figure 21.............................................................................. 14
Added Figure 31 and Figure 32..................................................... 16
Added Figure 35.............................................................................. 17
Changes to Figure 39...................................................................... 18
Added Figure 42.............................................................................. 19
Deleted Figure 50, Figure 51, Figure 53, and Figure 54............. 19
Added Figure 46.............................................................................. 20
Added Figure 49 and Figure 51..................................................... 21
Added Figure 59 and Figure 61..................................................... 23
Changes to DISABLE Circuitry Section...................................... 25
Added Low Noise FET Operational Amplifier Section............. 26
Added Figure 70, Figure 71, Figure 72, and Power Mode ADC
Driver Section ................................................................................. 27
Added ADC Driving Section and Figure 73 through Figure 77.....28
Added ADC Driving with Dynamic Power Scaling Section,
Figure 78, Figure 79, and Figure 80.............................................. 29
Added Figure 58 ............................................................................. 33
Changes to Ordering Guide .......................................................... 33
4/15—Rev. 0 to Rev. A
Added ADA4807-2.............................................................Universal
Changes to Features Section, General Description
Section, and Pin Connection Diagrams Heading .........................1
Added Figure 2 and Figure 3; Renumbered Sequentially ............1
Changes to Table 1.............................................................................3
Changes to Table 2.............................................................................5
Changes to Table 3.............................................................................7
Changes to Table 6 and Figure 4......................................................9
Added Figure 7, Figure 8, and Table 8; Renumbered Sequentially....11
Reorganized Layout, Typical Performance Characteristics
Section.............................................................................................. 12
Added Figure 36 ............................................................................. 16
Changes to Figure 37 Caption, Figure 38 Caption, Figure 39
Caption, and Figure 40 Caption ................................................... 17
Changes to Figure 44 and Figure 47............................................. 18
Change to Theory of Operation Section ..................................... 20
Changes to DISABLE Circuitry Section, Table 9, and Noise
Considerations Section.................................................................. 21
Added Figure 65 and Figure 66 .................................................... 23
Changes to Ordering Guide .......................................................... 25
12/14—Revision 0: Initial Version


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