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ADXL354BEZ Arkusz danych(PDF) 25 Page - Analog Devices |
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ADXL354BEZ Arkusz danych(HTML) 25 Page - Analog Devices |
25 / 42 page Data Sheet ADXL354/ADXL355 Rev. 0 | Page 25 of 42 SERIAL COMMUNICATIONS The 4-wire serial interface communicates in either the SPI or I2C protocol. It affectively autodetects the format being used, requiring no configuration control to select the format. SPI PROTOCOL Wire the ADXL355 for SPI communication as shown in the connection diagram in Figure 63. The SPI protocol timing is shown in Figure 64 to Figure 67. The timing scheme follows the clock polarity (CPOL) = 0 and clock phase (CPHA) = 0. The SPI clock speed ranges from 100 kHz to 10 MHz. PROCESSOR CS MOSI MISO SCLK DOUT DOUT DIN DOUT ADXL355 Figure 63. 4-Wire SPI Connection RW A6 A5 A4 A3 A2 A1 A0 12 345 678 9 10 11 12 13 14 15 16 CS SCLK MOSI MISO D7 D6 D5 D4 D3 D2 D1 D0 Figure 64. SPI Timing Diagram—Single-Byte Read D7 D6 D5 D4 D3 D2 D1 D0 1 23 456 789 10 11 12 13 14 15 16 SCLK MOSI MISO RW A6 A5 A4 A3 A2 A1 A0 CS Figure 65. SPI Timing Diagram—Single-Byte Write 10 11 12 13 14 15 16 17 12 34 56 78 9 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D0 D7 BYTE 1 BYTE n RW A6 A5 A4 A3 A2 A1 A0 SCLK MOSI MISO CS Figure 66. SPI Timing Diagram—Multibyte Read 10 11 12 13 14 15 16 17 BYTE 1 BYTE n 1 2345 6789 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D0 D7 RW A6 A5 A4 A3 A2 A1 A0 SCLK MOSI MISO CS Figure 67. SPI Timing Diagram—Multibyte Write |
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