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TSB43CA42 Arkusz danych(PDF) 4 Page - Texas Instruments |
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TSB43CA42 Arkusz danych(HTML) 4 Page - Texas Instruments |
4 / 97 page TSB43Cx43A/ TI iceLynx-Micro™ IEEE 1394a-2000 TSB43CA42 Consumer Electronics Solution TEXAS INSTRUMENTS SLLS546F – March 2004 – Revised September 2004 PRODUCTION DATA information is current as of public date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. TEXAS INSTRUMENTS Copyright 2004, Texas Instruments Incorporated MARCH 12, 2004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4 1.14.1 3-Port PHY ............................................................................................................................ 72 1.14.2 PHY Registers ....................................................................................................................... 72 1.14.3 Port Status Page Register..................................................................................................... 75 1.14.4 Vendor Identification Page Register...................................................................................... 77 1.14.5 PHY Application Information ................................................................................................. 77 1.14.6 PHY Reference Documents .................................................................................................. 79 1.15 Power Management.................................................................................................................... 79 1.15.1 PU to A (Power-Up State to Active State)............................................................................. 81 1.15.2 A to LP1 (Active State to Low Power 1 State)....................................................................... 81 1.15.3 LP1 to A (Low Power 1 State to Active State)....................................................................... 81 1.15.4 A to LP2 (Active State to Low Power 2 State)....................................................................... 81 1.15.5 LP2 to A (Low Power 2 State to Active State)....................................................................... 82 1.15.6 A to LP4 (Low Power 3 State to Active State)....................................................................... 82 1.15.7 LP4 to A (Low Power 3 State to Active State)....................................................................... 82 1.16 16.5K Byte Memory - FIFO......................................................................................................... 83 1.16.1 Overview/Description ............................................................................................................83 1.16.2 Isochronous FIFOs 0 and 1................................................................................................... 83 1.16.3 Asynchronous/Asynchronous Stream FIFOs ........................................................................ 84 1.16.4 Broadcast Receive FIFO ....................................................................................................... 85 1.16.5 FIFO Priority .......................................................................................................................... 85 1.16.6 FIFO Monitoring..................................................................................................................... 85 1.17 GPIO Configurations................................................................................................................... 86 1.17.1 GPIO Setup ........................................................................................................................... 86 1.18 IEEE 1394a-2000 Requirements ................................................................................................ 86 1.18.1 Features ................................................................................................................................ 86 1.18.2 Cycle Master.......................................................................................................................... 87 2 Appendix A: Configuration Registers................................................................................................... 88 2.1 Configuration Registers .............................................................................................................. 88 2.2 Description Notes........................................................................................................................ 88 2.3 CFR Address Ranges (Offset from CFR Base Address)............................................................ 88 2.4 Register Access .......................................................................................................................... 89 3 General Information ............................................................................................................................. 90 3.1 Package Size .............................................................................................................................. 90 3.2 Operating Voltage....................................................................................................................... 90 3.3 Operating Temperature .............................................................................................................. 90 4 Absolute Maximum Ratings Over Operating Temperature Ranges† .................................................. 90 4.1 Recommended Operating Conditions (Analog IEEE 1394 I/F) .................................................. 91 4.2 Electrical Characteristics Over Recommended Operating Conditions (Unless Otherwise Noted)........................................................................................................... 92 4.3 Electrical Characteristics Over Recommended Ranges of Operating Conditions (Unless Otherwise Noted)........................................................................................................... 92 4.3.1 Device.................................................................................................................................... 92 4.3.2 Driver ..................................................................................................................................... 92 4.3.3 Receiver ................................................................................................................................ 93 4.4 Thermal Characteristics.............................................................................................................. 93 4.5 Switching Characteristics for PHY Port Interface ....................................................................... 93 4.6 Operating, Timing, and Switching Characteristics of XI ............................................................. 93 5 Reset Power States ............................................................................................................................. 94 6 Configuration Register Map ................................................................................................................. 94 7 Mechanical Data .................................................................................................................................. 95 7.1 PQFP Package Information ........................................................................................................95 7.2 µ*BGA Package Dimensions...................................................................................................... 96 7.3 ZGW Package Dimensions......................................................................................................... 97 |
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