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ADS114S0x Arkusz danych(PDF) 9 Page - Texas Instruments |
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ADS114S0x Arkusz danych(HTML) 9 Page - Texas Instruments |
9 / 103 page 9 ADS114S06, ADS114S08 www.ti.com SBAS815 – FEBRUARY 2017 Product Folder Links: ADS114S06 ADS114S08 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Electrical Characteristics (continued) minimum and maximum specifications apply from TA = –50°C to +125°C; Typical specifications are at TA = 25°C; all specifications are at AVDD = 2.7 V to 5.25 V, AVSS = 0 V, DVDD = IOVDD = 3.3 V, all gains, internal reference, internal oscillator, all data rates, and global chop disabled (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (4) The IDAC current does not change by more than 0.1% from the nominal value when staying within the specified compliance voltage. VOLTAGE REFERENCE INPUTS Absolute input current Reference buffers disabled, external VREF = 2.5 V, REFP1/REFN1 inputs -6 4 6 µA/V Reference buffers enabled, external VREF = 2.5 V, REFP1/REFN1 inputs –15 5 15 nA INTERNAL VOLTAGE REFERENCE VREF Output voltage 2.5 V Accuracy TA = 25°C –0.05% ±0.01% 0.05% Temperature drift TA = –40°C to +85°C 2.5 8 ppm/°C TA = –50°C to +125°C 3 10 Output current AVDD = 2.7 V to 3.3 V, sink and source –5 5 mA AVDD = 3.3 V to 5.25 V, sink and source –10 10 Short-circuit current limit Sink and source 70 100 mA PSRR Power-supply rejection ratio AVDD at dc 85 dB Load regulation AVDD = 2.7 V to 3.3 V, load current = –5 mA to 5 mA 8 µV/mA AVDD = 3.3 V to 5.25 V, load current = –10 mA to 10 mA 8 Startup time 1-µF capacitor on REFOUT, 0.001% settling 5.9 ms Capacitive load stability Capacitor on REFOUT 1 47 µF Reference noise f = 0.1 Hz to 10 Hz, 1-µF capacitor on REFOUT 17.5 µVPP INTERNAL OSCILLATOR fCLK Frequency 4.096 MHz Accuracy –1.5% 1.5% EXCITATION CURRENT SOURCES (IDACS) Current settings 10, 50, 100, 250, 500, 750, 1000, 1500, 2000 µA Compliance voltage(4) 10 µA to 750 µA, 0.1% deviation AVSS AVDD – 0.4 V 1 mA to 2 mA, 0.1% deviation AVSS AVDD – 0.6 Accuracy (each IDAC) TA = 25°C, 10 µA to 100 µA –5% ±0.7% 5% TA = 25°C, 250 µA to 2 mA –3% ±0.5% 3% Current mismatch between IDACs TA = 25°C, 10 µA to 100 µA 0.15% 0.8% TA = 25°C, 250 µA to 750 µA 0.10% 0.6% TA = 25°C, 1 mA to 2 mA 0.07% 0.4% Temperature drift (each IDAC) 10 µA to 750 µA 20 120 ppm/°C 1 mA to 2 mA 10 80 Temperature drift matching between IDACs 10 µA to 100 µA 3 25 ppm/°C 250 µA to 2 mA 2 15 Startup time With internal reference already settled. From end of WREG command to current flowing out of pin. 22 µs |
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