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STGIPQ5C60T-HZ Arkusz danych(PDF) 9 Page - STMicroelectronics |
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STGIPQ5C60T-HZ Arkusz danych(HTML) 9 Page - STMicroelectronics |
9 / 26 page STGIPQ5C60T-HL, STGIPQ5C60T-HZ Electrical characteristics DocID026844 Rev 7 9/26 Table 11: Logic inputs Symbol Parameter Test conditions Min. Typ. Max. Unit Vil Low logic level voltage 0.8 V Vih High logic level voltage 2.25 V IHINh HIN logic “1” input bias current HIN = 15 V 20 40 100 µA IHINl HIN logic “0” input bias current HIN = 0 V 1 µA ILINl LIN logic “0” input bias current LIN = 0 V 1 µA ILINh LIN logic “1” input bias current LIN = 15 V 20 40 100 µA ISDh SD logic “0” input bias current SD = 15 V 220 295 370 µA ISDl SD logic “1” input bias current SD = 0 V 3 µA Dt Dead time See Figure 8: "Dead time and interlocking waveform definitions" 180 ns Table 12: Op-amp characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit Vio Input offset voltage Vic = 0 V, Vo = 7.5 V 6 mV Iio Input offset current Vic = 0 V, Vo = 7.5 V 4 40 nA Iib Input bias current (1) 100 200 nA VOL Low level output voltage RL = 10 kΩ to VCC 75 150 mV VOH High level output voltage RL = 10 kΩ to GND 14 14.7 V Io Output short-circuit current Source, Vid = + 1 V; Vo = 0 V 16 30 mA Sink, Vid = -1 V; Vo = VCC 50 80 mA SR Slew rate Vi = 1 - 4 V; CL = 100 pF; unity gain 2.5 3.8 V/µs GBWP Gain bandwidth product Vo = 7.5 V 8 12 MHz Avd Large signal voltage gain RL = 2 kΩ 70 85 dB SVR Supply voltage rejection ratio vs VCC 60 75 dB CMRR Common mode rejection ratio 55 70 dB Notes: (1)The direction of input current is out of the IC. |
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