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DAC5682ZIRGCR Arkusz danych(PDF) 2 Page - Texas Instruments |
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DAC5682ZIRGCR Arkusz danych(HTML) 2 Page - Texas Instruments |
2 / 66 page DAC5682Z SLLS853F – AUGUST 2007 – REVISED JANUARY 2015 www.ti.com Table of Contents 8.4 Device Functional Modes........................................ 33 1 Features .................................................................. 1 8.5 Programming........................................................... 36 2 Applications ........................................................... 1 8.6 Register Maps ......................................................... 39 3 Description ............................................................. 1 9 Application and Implementation ........................ 49 4 Revision History..................................................... 2 9.1 Application Information............................................ 49 5 Description (continued)......................................... 4 9.2 Typical Application .................................................. 49 6 Pin Configuration and Functions ......................... 5 9.3 System Examples ................................................... 51 7 Specifications......................................................... 7 9.4 Initialization Set Up ................................................. 55 7.1 Absolute Maximum Ratings ...................................... 7 10 Power Supply Recommendations ..................... 55 7.2 ESD Ratings.............................................................. 7 11 Layout................................................................... 56 7.3 Recommended Operating Conditions ....................... 7 11.1 Layout Guidelines ................................................. 56 7.4 Thermal Information .................................................. 8 11.2 Layout Example .................................................... 56 7.5 Electrical Characteristics — DC Specification ......... 8 12 Device and Documentation Support ................. 57 7.6 Electrical Characteristics — AC Specification ....... 10 12.1 Device Support...................................................... 57 7.7 Electrical Characteristics (Digital Specifications) ... 11 12.2 Trademarks ........................................................... 57 7.8 Typical Characteristics ............................................ 15 12.3 Electrostatic Discharge Caution ............................ 57 8 Detailed Description ............................................ 19 12.4 Glossary ................................................................ 58 8.1 Overview ................................................................. 19 13 Mechanical, Packaging, and Orderable 8.2 Functional Block Diagram ....................................... 19 Information ........................................................... 58 8.3 Feature Description................................................. 20 4 Revision History Changes from Revision E (August 2012) to Revision F Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 Changes from Revision D (February 2011) to Revision E Page • Changed the Revision to E, August 2012 .............................................................................................................................. 1 • Changed the graphic entity of Figure 30 for clarification...................................................................................................... 23 • Changed the first paragraph of ANALOG CURRENT OUTPUTS section for clarification. .................................................. 29 Changes from Revision C (November 2008) to Revision D Page • Changed "defined by individual control bits in registers CONFIG1, CONFIG5 and CONFIG6." to "defined by individual control bits in registers CONFIG1 and CONFIG5." .............................................................................................. 26 • Changed wording in second sentence of RECOMMENED....PROCEDURE section from CONFIG5 clkdiv_sync_dis and FIFO_sync_dis bits as well to CONFIG5 clkdiv_sync_dis as well ............................................................................ 35 • Deleted list items in first and second ordered list in RECOMMENED....PROCEDURE section ......................................... 35 • Changed CONFIG5 Bit4 from "FIFO_ sync_dis" to "Reserved" in Register Map ................................................................ 39 • Changed CONFIG6 Bit 7 from "Hold_ sync_dis" to "Reserved" in Register Map ................................................................ 39 • Deleted - unless-----CONFIG5 register. in FIFO_offset(2:0): on page 21 ............................................................................ 40 • Changed Bit 4 in CONFIG5 table from FIFO_sync_dis to Reserved ................................................................................... 43 • Changed "FIFO_sync_sis: Disables the FIFO offset sync........ CONFIG1 register" to "Reserved (Bit 4): Set to 0 for proper operation." ................................................................................................................................................................. 43 • Changed Hold_sync _dis to Reserved ................................................................................................................................. 43 • Changed from Hold_sync_dis: When set, disables the sync to the FIFO .....control bit in CONFIG5." to " Reserved (Bit 7): Set to 0 for proper operation." .................................................................................................................................. 43 2 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated Product Folder Links: DAC5682Z |
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