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DM8147BCIS0 Arkusz danych(PDF) 2 Page - Texas Instruments |
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DM8147BCIS0 Arkusz danych(HTML) 2 Page - Texas Instruments |
2 / 377 page TMS320DM8148, TMS320DM8147 SPRS647E – MARCH 2011 – REVISED DECEMBER 2013 www.ti.com • One 8-/16-/24-Bit Input and One 8-Bit Only or OTG Input Channels – Supports End Points 0–15 – Two 165-MHz HD Video Display Outputs • One PCI Express 2.0 Port With Integrated PHY • One 16-, 24-, or 30-Bit Output and One 16- – Single Port With One Lane at 5.0 GT/s or 24-Bit Output – Configurable as Root Complex or Endpoint – Composite or S-Video Analog Output • Eight 32-Bit General-Purpose Timers – Macrovision® Support Available (Timer1–8) – Digital HDMI 1.3 Transmitter With Integrated • One System Watchdog Timer (WDT0) PHY • Six Configurable UART/IrDA/CIR Modules – Advanced Video Processing Features Such – UART0 With Modem Control Signals as Scan, Format, Rate Conversion – Supports up to 3.6864 Mbps UART0/1/2 – Three Graphics Layers and Compositors – Supports up to 12 Mbps UART3/4/5 • Dual 32-Bit DDR2/DDR3 SDRAM Interfaces – SIR, MIR, FIR (4.0 MBAUD), and CIR – Supports up to DDR2-800 and DDR3-1066 • Four Serial Peripheral Interfaces (SPIs) (up to – Up to Eight x 8 Devices Total 2GB of Total 48 MHz) Address Space – Each With Four Chip Selects – Dynamic Memory Manager (DMM) • Three MMC/SD/SDIO Serial Interfaces (up to • Programmable Multi-Zone Memory 48 MHz) Mapping and Interleaving – Three Supporting up to 1-, 4-, or 8-Bit Modes • Enables Efficient 2D Block Accesses • Dual Controller Area Network (DCAN) Modules • Supports Tiled Objects in 0°, 90°, 180°, or – CAN Version 2 Part A, B 270° Orientation and Mirroring • Four Inter-Integrated Circuit (I2C Bus) Ports • Optimizes Interlaced Accesses • Six Multichannel Audio Serial Ports (McASPs) • General-Purpose Memory Controller (GPMC) – Dual Ten Serializer Transmit and Receive – 8- or 16-Bit Multiplexed Address and Data Ports Bus – Quad Four Serializer Transmit and Receive – 512MB of Address Space Divided Among up Ports to 8 Chip Selects – DIT-Capable For S/PDIF (All Ports) – Glueless Interface to NOR Flash, NAND • Multichannel Buffered Serial Port (McBSP) Flash (BCH/Hamming Error Code Detection), – Transmit and Receive Clocks up to 48 MHz SRAM and Pseudo-SRAM – Two Clock Zones and Two Serial Data Pins – Error Locator Module (ELM) Outside of – Supports TDM, I2S, and Similar Formats GPMC to Provide Up to 16-Bit or 512-Byte Hardware ECC for NAND • Serial ATA (SATA) 3.0 Gbps Controller With Integrated PHY – Flexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs, and so – Direct Interface to One Hard Disk Drive Forth – Hardware-Assisted Native Command • Enhanced Direct Memory Access (EDMA) Queuing (NCQ) from up to 32 Entries Controller – Supports Port Multiplier and Command- – Four Transfer Controllers Based Switching – 64 Independent DMA Channels and 8 • Real-Time Clock (RTC) Independent QDMA Channels – One-Time or Periodic Interrupt Generation • Dual Port Ethernet (10/100/1000 Mbps) With • Up to 128 General-Purpose I/O (GPIO) Pins Optional Switch • One Spin Lock Module with up to 128 Hardware – IEEE 802.3 Compliant (3.3-V I/O Only) Semaphores – MII/RMII/GMII/RGMII Media Independent • One Mailbox Module with 12 Mailboxes Interfaces • On-Chip ARM ROM Bootloader (RBL) – Management Data I/O (MDIO) Module • Power, Reset, and Clock Management – Reset Isolation – Multiple Independent Core Power Domains – IEEE 1588 Time-Stamping and Industrial – Multiple Independent Core Voltage Domains Ethernet Protocols – Support for Three Operating Points (OPP100, • Dual USB 2.0 Ports With Integrated PHYs OPP120, OPP166) per Voltage Domain – USB2.0 High- and Full-Speed Clients – Clock Enable and Disable Control for – USB2.0 High-, Full-, and Low-Speed Hosts, Subsystems and Peripherals 2 High-Performance System-on-Chip (SoC) Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320DM8148 TMS320DM8147 |
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