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L7987 Arkusz danych(PDF) 11 Page - STMicroelectronics

Numer części L7987
Szczegółowy opis  Adjustable current limitation
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
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L7987 Arkusz danych(HTML) 11 Page - STMicroelectronics

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L7987
Functional description
37
4
Functional description
The L7987 device is based on a voltage mode, constant frequency control loop. The output
voltage VOUT, sensed by the feedback pin (FB), is compared to an internal reference
(0.8 V) providing an error signal on the COMP pin. The COMP voltage level is then
compared to a fixed frequency sawtooth ramp, which finally controls the on- and off-time of
the power switch.
The main internal blocks are shown in the block diagram in Figure 2 on page 4 and can be
summarized as follow.
The fully integrated oscillator that provides the sawtooth ramp to modulate the duty
cycle and the synchronization signal. Its switching frequency can be adjusted by an
external resistor. The input voltage feed-forward is implemented.
The soft-start circuitry to limit inrush current during the start-up phase.
The voltage mode error amplifier.
The pulse width modulator and the relative logic circuitry necessary to drive the internal
power switch.
The high-side driver for embedded N-channel Power MOSFET switch and bootstrap
circuitry. A dedicated high resistance low-side MOSFET, for anti-boot discharge
management purposes, is also present.
The peak current limit sensing block, with programmable threshold, to handle overload
and short-circuit conditions including current foldback and a thermal shutdown block, to
prevent thermal runaway.
The voltage regulator and internal reference, to supply the internal circuitry and provide
a fixed internal reference. The switchover function from VCC to VBIAS can be
implemented for higher efficiency. This block also implements a voltage monitor
circuitry (UVLO) that checks the input and internal voltages.
The output voltage monitor circuitry which releases the PGOOD signal if the sensed
output voltage is above 87% of the target value.
4.1
Oscillator and synchronization
Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides
a constant frequency clock, whose frequency depends on the resistor externally connected
between the FSW pin and ground.
Figure 4. Oscillator and synchronization


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