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AD6311QF Arkusz danych(PDF) 2 Page - List of Unclassifed Manufacturers |
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AD6311QF Arkusz danych(HTML) 2 Page - List of Unclassifed Manufacturers |
2 / 11 page AD6311 1/8- to 1/16 Duty VFD Controller/Driver Anachip Corp. www.anachip.com.tw Rev. A5 Dec 29, 2003 2/11 Pin Descriptions Symbol Name No. Description DIN Data input 6 Input serial data at rising edge of shift clock, starting from the low order bit. DOUT Data output 5 Output serial data at the falling edge of the shift clock, starting from low order bit. This is N-ch open-drain output pin. STB Strobe 9 Initializes serial interface at the rising or falling edge of the AD6311. It then waits for reception of a command. Data input after STB falling is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored. CLK Clock input 8 Reads serial data at the rising edge, and outputs data at the falling edge. OSC Oscillator pin 52 Connect resistor in between this pin and Vdd to set up the oscillation frequency. Seg1/KS1 to Seg12/KS12 High-voltage output 15 to 26 Multi-function pins, Segment output pins (Dual function as key scan source) Grid1 to Grid8 High-voltage output (Grid) 37 to 44 Grid output pins Seg13/Grid16 to Seg20/Grid9 High-voltage output (Segment/grid) 27 to 32 35, 36 These pins are selectable for segment or grid driving. LED1 to LED5 LED output 46 to 50 CMOS output KEY1 to KEY4 Key data input 10 to 13 Data input to these pins is latched at the end of the display cycle. VDD Logic power 14, 33, 45 Logic power supply VSS Logic ground 51 Connect this pin to system GND. VEE Pull-down level 34 Driver power supply SW1 to SW4 Switch input 1 to 4 These pins constitute a 4-bit general-purpose input port. NC NC 7 No connection Ordering Information AD6311X X X Packing Blank : Tray Q: QFP-52L Package Lead Blank: Normal F: Lead Free |
Podobny numer części - AD6311QF |
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Podobny opis - AD6311QF |
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