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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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ADC78H90CIMTX Arkusz danych(PDF) 2 Page - National Semiconductor (TI) |
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ADC78H90CIMTX Arkusz danych(HTML) 2 Page - National Semiconductor (TI) |
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2 / 16 page  Block Diagram 20079307 Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Description ANALOG I/O 4 - 11 AIN1 to AIN8 Analog inputs. These signals can range from 0V to AV DD. DIGITAL I/O 16 SCLK Digital clock input. The range of frequencies for this input is 50 kHz to 8 MHz, with guaranteed performance at 8 MHz. This clock directly controls the conversion and readout processes. 15 DOUT Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin. 14 DIN Digital data input. The ADC78H90’s Control Register is loaded through this pin on rising edges of the SCLK pin. 1CS Chip select. On the falling edge of CS, a conversion process begins. Conversions continue as long as CS is held low. POWER SUPPLY 2AV DD Positive analog supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF tantalum capacitor and a 0.1 µF ceramic monolithic capacitor located within 1 cm of the power pin. 13 DV DD Positive digital supply pin. This pin should be connected to a +2.7V to AV DD supply, and bypassed to GND with a 0.1 µF ceramic monolithic capacitor located within 1 cm of the power pin. 3 AGND The ground return for the analog supply and signals. 12 DGND The ground return for the digital supply and signals. www.national.com 2 |
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