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HCPL-5300 Arkusz danych(PDF) 6 Page - Broadcom Corporation.

Numer części HCPL-5300
Szczegółowy opis  Intelligent Power Module and Gate Drive Interface Hermetically Sealed Optocouplers
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Producent  BOARDCOM [Broadcom Corporation.]
Strona internetowa  http://www.broadcom.com
Logo BOARDCOM - Broadcom Corporation.

HCPL-5300 Arkusz danych(HTML) 6 Page - Broadcom Corporation.

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Broadcom
- 6 -
HCPL-5300, HCPL-5301, HCPL-530K, 5962-96852
Data Sheet
Switching Specifications (RL= 20 kΩ External)
Switching Specifications (RL= 20 kΩ External)
Over recommended operating conditions (TA = –55°C to +125°C, VCC = +4.5V to 30V, IF(ON) = 10 mA to 20 mA, VF(OFF) = –5V to 0.8V)
unless otherwise specified.
Parameter
Symbol
Group A
Subgroupsa
a.
Commercial parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD, Class H and K parts receive 100% testing at 25°C, +125°C, and –55°C (Subgroups 1
and 9, 2 and 10, 3 and 11 respectively).
Min
Typb
b.
All typical values at 25°C, VCC = 15V.
Max
Unit
Test Conditions
Fig
Note
Propagation Delay Time
to Low Output Level
tPHL
9, 10, 11
30
180
450
ns
CL = 100 pF
IF(on) = 10 mA,
VF(off) = 0.8V,
VCC = 15.0V,
VTHLH = 2.0V,
VTHHL = 1.5V
5, 7,
9,-12
c, d, e, f, g
c.
Pulse: f = 20 kHz, Duty Cycle = 10%.
d.
The internal 20 kΩ resistor can be used by shorting pins 6 and 7 together.
e.
Due to the tolerance of the internal resistor, and since propagation delay is dependent on the load resistor value, performance can be improved by using an
external 20 kΩ 1% load resistor. For more information on how propagation delay varies with load resistance, see Figure 8.
f.
The RL = 20 kΩ, CL = 100 pF represents a typical IPM (Intelligent Power Module) load.
g.
Use of a 0.1-μF bypass capacitor connected between pins 5 and 8 can improve performance by filtering power supply line noise.
100
ns
CL = 10 pF
Propagation Delay Time
to High Output Level
tPLH
9, 10, 11
250
350
650
ns
CL = 100 pF
130
ns
CL = 10 pF
Pulse Width Distortion
PWD
9, 10, 11
150
450
ns
CL = 100 pF
h
h.
Pulse Width Distortion (PWD) is defined as the difference between tPLH and tPHL for any given device.
Propagation Delay
Difference Between Any
Two Parts
tPLH -tPHL
9, 10, 11
–170
140
500
ns
i
i.
The difference in tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications.)
Output High Level
Common Mode
Immunity Transient
|CMH|
9
10
17
kV/
µsI
F = 0 mA,
VO > 3.0V
VCC = 15.0V,
CL = 100 pF,
VCM = 1000 VP-P
TA = 25°C
6, 17,
18, 21
j, k
j.
Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output
remains in a Logic High state (i.e., VO > 3.0V).
k.
Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits specified for all lots
not specifically tested.
Output Low Level
Common Mode Transient
Immunity
|CML|
9
10
17
kV/
µsI
F = 10 mA
VO < 1.0V
l, k
l.
Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output remains
in a Logic Low state (i.e., VO < 1.0V).


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