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DM505MRABFR Arkusz danych(PDF) 9 Page - Texas Instruments

Numer części DM505MRABFR
Szczegółowy opis  SoC for Vision Analytics 15mm Package (ABF) Silicon Revision 2.0
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DM505
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SPRS976D – NOVEMBER 2016 – REVISED JULY 2017
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Terminal Configuration and Functions
Copyright © 2016–2017, Texas Instruments Incorporated
4. MUXMODE: Multiplexing mode number:
(a) MUXMODE 0 is the primary mode; this means that when MUXMODE=0 is set, the function
mapped on the pin corresponds to the name of the pin. The primary muxmode is not necessarily
the default muxmode.
NOTE
The default mode is the mode at the release of the reset; also see the RESET REL.
MUXMODE column.
(b) MUXMODE 1 through 15 are possible muxmodes for alternate functions. On each pin, some
muxmodes are effectively used for alternate functions, while some muxmodes are not used. Only
MUXMODE values which correspond to defined functions should be used.
5. TYPE: Signal type and direction:
I = Input
O = Output
IO = Input or Output
D = Open drain
DS = Differential Signaling
A = Analog
PWR = Power
GND = Ground
CAP = LDO Capacitor
6. BALL RESET STATE: The state of the terminal at power-on reset:
drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated).
drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated).
OFF: High-impedance
PD: High-impedance with an active pulldown resistor
PU: High-impedance with an active pullup resistor
7. BALL RESET REL. STATE: The state of the terminal at the deactivation of the rstoutn signal (also
mapped to the PRCM SYS_WARM_OUT_RST signal).
drive 0 (OFF): The buffer drives VOL (pulldown or pullup resistor not activated).
drive clk (OFF): The buffer drives a toggling clock (pulldown or pullup resistor not activated).
drive 1 (OFF): The buffer drives VOH (pulldown or pullup resistor not activated).
OFF: High-impedance
PD: High-impedance with an active pulldown resistor
PU: High-impedance with an active pullup resistor
NOTE
For more information on the CORE_PWRON_RET_RST reset signal and its reset sources,
see the Power, Reset, and Clock Management / Reset Management Functional Description
section of the Device TRM.
8. BALL RESET REL. MUXMODE: This muxmode is automatically configured at the release of the
rstoutn signal (also mapped to the PRCM SYS_WARM_OUT_RST signal).
9. IO VOLTAGE VALUE: This column describes the IO voltage value (the corresponding power supply).
10. POWER: The voltage supply that powers the terminal IO buffers.
11. HYS: Indicates if the input buffer is with hysteresis:
Yes: With hysteresis
No: Without hysteresis
An empty box means "Yes".


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