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DM505MRABFR Arkusz danych(PDF) 10 Page - Texas Instruments

Numer części DM505MRABFR
Szczegółowy opis  SoC for Vision Analytics 15mm Package (ABF) Silicon Revision 2.0
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DM505MRABFR Arkusz danych(HTML) 10 Page - Texas Instruments

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DM505
SPRS976D – NOVEMBER 2016 – REVISED JULY 2017
www.ti.com
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Terminal Configuration and Functions
Copyright © 2016–2017, Texas Instruments Incorporated
NOTE
For more information, see the hysteresis values in Section 5.7, DC Electrical Characteristics.
12. BUFFER TYPE: Drive strength of the associated output buffer.
NOTE
For programmable buffer strength:
The default value is given in Table 4-1.
A note describes all possible values according to the selected muxmode.
13. PULL UP / DOWN TYPE: Denotes the presence of an internal pullup or pulldown resistor. Pullup and
pulldown resistors can be enabled or disabled via software.
14. DSIS: The deselected input state (DSIS) indicates the state driven on the peripheral input (logic "0" or
logic "1") when the peripheral pin function is not selected by any of the CTRL_CORE_PADx registers.
0: Logic 0 driven on the peripheral's input signal port.
1: Logic 1 driven on the peripheral's input signal port.
blank: Pin state driven on the peripheral's input signal port.
NOTE
Configuring two pins to the same input signal is not supported as it can yield unexpected
results. This can be easily prevented with the proper software configuration (Hi-Z mode is not
an input signal).
NOTE
When a pad is set into a multiplexing mode which is not defined by pin multiplexing, that
pad’s behavior is undefined. This should be avoided.


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