Zakładka z wyszukiwarką danych komponentów |
|
GS81302T18E-300 Arkusz danych(PDF) 1 Page - GSI Technology |
|
GS81302T18E-300 Arkusz danych(HTML) 1 Page - GSI Technology |
1 / 36 page GS81302T08/09/18/36E-375/350/333/300/250 144Mb SigmaDDRTM-II Burst of 2 SRAM 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 165-Bump BGA Commercial Temp Industrial Temp Rev: 1.03b 12/2011 1/35 © 2011, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Features • Simultaneous Read and Write SigmaDDR™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write (x36 and x18) and Nybble Write (x8) function • Burst of 2 Read and Write • 1.8 V +100/–100 mV core power supply • 1.5 V or 1.8 V HSTL Interface • Pipelined read operation with self-timed Late Write • Fully coherent read and write pipelines • ZQ pin for programmable output drive strength • IEEE 1149.1 JTAG-compliant Boundary Scan • Pin-compatible with present 9Mb, 18Mb, 36Mb and 72Mb devices • 165-bump, 15 mm x 17 mm, 1 mm bump pitch BGA package • RoHS-compliant 165-bump BGA package available SigmaDDR™ Family Overview The GS81302T08/09/18/36E are built in compliance with the SigmaDDR-II SRAM pinout standard for Common I/O synchronous SRAMs. They are 150,994,944-bit (144Mb) SRAMs. The GS81302T08/09/18/36E SigmaDDR-II SRAMs are just one element in a family of low power, low voltage HSTL I/O SRAMs designed to operate at the speeds needed to implement economical high performance networking systems. Clocking and Addressing Schemes The GS81302T08/09/18/36E SigmaDDR-II SRAMs are synchronous devices. They employ two input register clock inputs, K and K. K and K are independent single-ended clock inputs, not differential inputs to a single differential clock input buffer. The device also allows the user to manipulate the output register clock inputs quasi independently with the C and C clock inputs. C and C are also independent single-ended clock inputs, not differential inputs. If the C clocks are tied high, the K clocks are routed internally to fire the output registers instead. Each internal read and write operation in a SigmaDDR-II B2 RAM is two times wider than the device I/O bus. An input data bus de-multiplexer is used to accumulate incoming data before it is simultaneously written to the memory array. An output data multiplexer is used to capture the data produced from a single memory array read and then route it to the appropriate output drivers as needed. When a new address is loaded into a x18 or x36 version of the part, A0 is used to initialize the pointers that control the data multiplexer / de-multiplexer so the RAM can perform "critical word first" operations. From an external address point of view, regardless of the starting point, the data transfers always follow the same sequence {0, 1} or {1, 0} (where the digits shown represent A0). Unlike the x18 and x36 versions, the input and output data multiplexers of the x8 and x9 versions are not preset by address inputs and therefore do not allow "critical word first" operations. The address fields of the x8 and x9 SigmaDDR-II B2 RAMs are one address pin less than the advertised index depth (e.g., the 16M x 8 has an 8M addressable index, and A0 is not an accessible address pin). Parameter Synopsis -375 -350 -333 -300 -250 tKHKH 2.66 ns 2.86 ns 3.0 ns 3.3 ns 4.0 ns tKHQV 0.45 ns 0.45 ns 0.45 ns 0.45 ns 0.45 ns |
Podobny numer części - GS81302T18E-300 |
|
Podobny opis - GS81302T18E-300 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |