SN74LVC1G38DCKR datasheet(4/19 Pages) TI1

Numer części	SN74LVC1G38DCKR

Szczegółowy opis	Single 2-Input NAND Gate With Open-Drain Output

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SN74LVC1G38

SCES538E – JANUARY 2004 – REVISED AUGUST 2017

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Product Folder Links: SN74LVC1G38

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(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VCC

Supply voltage

–0.5

6.5

V

VI

Input voltage(2)

–0.5

6.5

V

VO

Voltage range applied to any output in the high-impedance or power-off state (2)

–0.5

6.5

V

IIK

Input clamp current

VI < 0

–50

mA

IOK

Output clamp current

VO < 0

–50

mA

IO

Continuous output current

±50

mA

Continuous current through VCC or GND

±100

mA

TJ

Maximum junction temperature

150

°C

Tstg

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

1000

Machine Model (MM), A115-A

200

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