Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

GS81302D10GE-300I Arkusz danych(PDF) 8 Page - GSI Technology

Numer części GS81302D10GE-300I
Szczegółowy opis  144Mb SigmaQuad-IITM Burst of 4 SRAM
Download  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  GSI [GSI Technology]
Strona internetowa  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS81302D10GE-300I Arkusz danych(HTML) 8 Page - GSI Technology

Back Button GS81302D10GE-300I Datasheet HTML 4Page - GSI Technology GS81302D10GE-300I Datasheet HTML 5Page - GSI Technology GS81302D10GE-300I Datasheet HTML 6Page - GSI Technology GS81302D10GE-300I Datasheet HTML 7Page - GSI Technology GS81302D10GE-300I Datasheet HTML 8Page - GSI Technology GS81302D10GE-300I Datasheet HTML 9Page - GSI Technology GS81302D10GE-300I Datasheet HTML 10Page - GSI Technology GS81302D10GE-300I Datasheet HTML 11Page - GSI Technology GS81302D10GE-300I Datasheet HTML 12Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 31 page
background image
GS81302D07/10/19/37E-450/400/350/333/300
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04b 8/2017
8/31
© 2011, GSI Technology
FLXDrive-II Output Driver Impedance Control
HSTL I/O SigmaQuad-II+ SRAMs are supplied with programmable impedance output drivers. The ZQ pin must be connected to
VSS via an external resistor, RQ, to allow the SRAM to monitor and adjust its output driver impedance. The value of RQ must be
5X the value of the desired RAM output impedance. The allowable range of RQ to guarantee impedance matching continuously is
between 175
 and 350. Periodic readjustment of the output driver impedance is necessary as the impedance is affected by drifts
in supply voltage and temperature. The SRAM’s output impedance circuitry compensates for drifts in supply voltage and
temperature. A clock cycle counter periodically triggers an impedance evaluation, resets and counts again. Each impedance
evaluation may move the output driver impedance level one step at a time towards the optimum level. The output driver is
implemented with discrete binary weighted impedance steps.
Input Termination Impedance Control
These SigmaQuad-II+ SRAMs are supplied with programmable input termination on Data (D), Byte Write (BW), and Clock (K/K)
input receivers. Input termination can be enabled or disabled via the ODT pin (6R). When the ODT pin is tied Low (or left
floating —the pin has a small pull-down resistor), input termination is disabled. When the ODT pin is tied High, input termination
is enabled. Termination impedance is programmed via the same RQ resistor (connected between the ZQ pin and VSS) used to
program output driver impedance, and is nominally RQ*0.6 Thevenin-equivalent when RQ is between 175
 and 250. Periodic
readjustment of the termination impedance occurs to compensate for drifts in supply voltage and temperature, in the same manner
as for driver impedance (see above).
Note:
When ODT = 1, Data (D), Byte Write (BW), and Clock (K, K) input termination is always enabled. Consequently, D, BW, K, K
inputs should always be driven High or Low; they should never be tri-stated (i.e., in a High-Z state). If the inputs are tri-stated, the
input termination will pull the signal to VDDQ/2 (i.e., to the switch point of the diff-amp receiver), which could cause the receiver
to enter a meta-stable state, resulting in the receiver consuming more power than it normally would. This could result in the
device’s operating currents being higher.


Podobny numer części - GS81302D10GE-300I

ProducentNumer częściArkusz danychSzczegółowy opis
logo
GSI Technology
GS81302D10GE-300I GSI-GS81302D10GE-300I Datasheet
251Kb / 32P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
More results

Podobny opis - GS81302D10GE-300I

ProducentNumer częściArkusz danychSzczegółowy opis
logo
GSI Technology
GS81302D07GE-333I GSI-GS81302D07GE-333I Datasheet
517Kb / 31P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302D37GE-300 GSI-GS81302D37GE-300 Datasheet
251Kb / 32P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302D19AGD-375 GSI-GS81302D19AGD-375 Datasheet
434Kb / 25P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302DT10GE-450 GSI-GS81302DT10GE-450 Datasheet
513Kb / 30P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302D37GE-300I GSI-GS81302D37GE-300I Datasheet
517Kb / 31P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302DT19AGD-450 GSI-GS81302DT19AGD-450 Datasheet
436Kb / 25P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302DT37AGD-375I GSI-GS81302DT37AGD-375I Datasheet
436Kb / 25P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302DT37E-300 GSI-GS81302DT37E-300 Datasheet
513Kb / 30P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302DT37E-333I GSI-GS81302DT37E-333I Datasheet
513Kb / 30P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302DT07GE-300I GSI-GS81302DT07GE-300I Datasheet
513Kb / 30P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
GS81302D37E-375I GSI-GS81302D37E-375I Datasheet
517Kb / 31P
   144Mb SigmaQuad-IITM Burst of 4 SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com